Research On Reliability Improvement Of SR Latch PUF Based On FPGA

With the popularization of intelligent electronic devices,the Internet of things is another information technology revolution after the development of human society from the Internet.The Internet of things makes information exchange more and more convenient,but its complex and diverse application environment makes the security of its devices quite fragile.The physical unclonable function is an effective protection method,which mainly generates encryption primitives by using the random process deviation in the manufacturing process.The PUF circuit does not need to store the key in volatile memory,so the safety factor of the system is greatly improved.Field-programmable gate array(FPGA)devices are an essential part of protecting user access to networked hardware products.It has the advantages of encrypted bit stream,multiple key storage units,secure flash memory,tamper-proof,and PUF circuit implementation.Since the stability of PUF response is susceptible to the influence of temperature,voltage or aging of devices,which lead to unreliability,this dissertation mainly focuses on the improvement of PUF reliability based on FPGA:(1)With the widespread application of FPGA,its own hardware security issues should be taken seriously.The SR Latch PUF has a simple structure,low resource overhead,and easy implementation on FPGA,so it has become the research focus of this dissertation.(2)A strategy for weak delay adjustment is proposed.The instability principle of PUF circuit output is analyzed.According to the delay model in IC,the influence of external noise on circuit delay is simulated by the insertion of fan-out load.The change of delay is adjusted by the number of fan-out loads inserted(3)The PUF circuit is mapped on a reliable slice that has been selected through experiments.Under the condition of simulation experiment,the output of PUF circuit has no unstable bits,and the reliability reaches 100%.The structure design of this PUF circuit is very compact,and only one slice is needed to realize the entire circuit with minimal resource overhead.Therefore,it has high practical application value in lightweight and resource-limited platforms.