Study On The Techniques For Retrieval Of Finite State Machine Structure By Analytics Of Big Data

Integrated circuits(ICs)have been widely used in human life and the security of ICs is closely related to the security of every one and the security of the entire country.In the protection of IC security,it is crucial to analyze the possible threats and potential vulnerabilities of the ICs in advance.In the era of big data,data analysis technology has been well developed and has achieved remarkable successes in many fields.In the same time,these powerful data analytics have been great threats to IC security.With data analytics,hackers can improve their attack schemes,save time,reduce cost,and mine the potential information of ICs,thus greatly improving their attack ability.The finite state machine(FSM)is just under the threat of data analytics.As a top-level design,FSM is claimed to be irretrievable in a reasonably large design from the downstream design.Based on this concept,lots of FSM based security design have been proposed.However,data analytics such as data mining technology as well as data leakage in the ICs provide the possibility to reveal FSM information from the downstream information.Thus,this dissertation focuses on the data analytics based FSM retrieving algorithm.Data acquisition is the data base of data analysis.This dissertation firstly proposes a data acquisition scheme which is based on the full scan chain.With the development of digital ICs,circuits have higher and higher requirements for testability.As one of the best testability structures,the full scan chain design is widely used in digital ICs.However,the scan chain has become the bypass of circuit information leakage while improving the testability of the circuit.The work mode of full scan chain is controlled by signal TC and during the test model,the full scan chain will connect all registers in the circuit to a shift register which takes in test vectors from SI and outputs responses from SO.By connecting SO to SI,a full scan chain based data collection scheme is proposed by switching the TC signal with N clocks for testing mode and 1clock for normal mode in each period,where N denotes the number of registers in the scan chain.The states of all registers at continuous time can then be collected.A register feature,the register Impact,is proposed to quantitatively analyze the influence of a register on the working state of whole circuit.Consider that FSM usually is the control module of the ICs and will control the working state of whole circuit,FSM registers will have reasonable higher Impacts than that of the most normalregisters.To extract the register Impacts from collected data,a decision tree based Impact extraction algorithm is proposed.In this algorithm,the decision tree algorithm is applied to each register to fit the dependency relations between registers and a N×N dependency relation table can be constructed,where N denotes the number of registers.The register Impacts can then be computed from the table.A rough Impact based FSM register identification algorithm is proposed by simply identifying the registers with highest Impacts as FSM registers.Another register feature,the register Relevancy,is proposed to quantitatively analyze the correlations between state transition sequences(STSs)of registers.Consider that,there is segmentation information embedded in FSM states and state transitions,the STS of FSM is supposed to be regular which means the STSs of FSM registers will have strong correlations with each other.In the same time,STSs with strong correlations with have similar correlations with other STSs.Thus,if denote Relevancy between a register with other registers as Relev,which represents the Relevancy feature vector of the register,the Relevs of FSM registers will be close to each other in Euclidean distance.A Relevancy feature vector extraction algorithm is proposed to extract the Relev for each register.A Impact based dimension reduction strategy and the principle component analysis(PCA)are adopted to reduce the data noise.The k-means algorithm(KMA)can then be applied to the Relevs to divide the registers to several register sets,all of which are the alternative sets of FSM registers.We also propose a one-hot based FSM register identification algorithm for designs where FSM are one-hot encoded.After determining FSM register sets,a state transition graph(STG)extraction algorithm is proposed to extract the STG of the identified register set.In the experiments,the proposed scheme is applied on several complex designs from Open Cores.We propose two indicators,the correct detection rate(CDR)and hit rate(HR),to evaluate the effect of the identification of FSM registers.The experiment results show the feasibility of our both schemes in correctly identifying most FSM state registers with a high HR for a large majority of the designs.In the same time,the STG extraction is able to extract the most actual state transitions.