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Design Of Combined Routing Algorithm For Optimizing Power Consumption Of Network On Chip

Posted on:2020-03-09Degree:MasterType:Thesis
Country:ChinaCandidate:Z H GuFull Text:PDF
GTID:2428330611454746Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Common types of network-on-chip routing algorithms are deterministic routing algorithms and adaptive routing algorithms.The deterministic routing algorithm is characterized by poor performance,but the hardware overhead is relatively small.The characteristics of the adaptive routing algorithm are higher performance,but the implementation is more complicated and the hardware overhead is large.This thesis implements a combined routing algorithm that combines deterministic and adaptive routing algorithms.In the case of high power consumption requirements for the network-on-chip and low network performance requirements,the combined routing algorithm has less hardware overhead than the adaptive routing algorithm alone,which can reduce the power consumption of the network-on-chip.In this thesis,a combined routing algorithm combining deterministic routing algorithm and adaptive routing algorithm is implemented.The algorithm obtains the effect of reducing the power consumption of the network-on-chip with less performance loss.The main work of this thesis is as follows: Firstly,the difference of traffic between different nodes in the network is analyzed.Then,for the characteristics of the traffic difference of the network-on-chip nodes,the deterministic routing algorithm is adopted for the nodes with smaller traffic,and the adaptive routing algorithm is adopted for the nodes with larger traffic.Then an energy-performance product formula is established to determine the optimal replacement ratio of network node algorithm.The formula consists of three parts: delay,throughput,and power consumption.Among the energy efficiency products of all replacement ratios,the replacement ratio with the smallest energy efficiency product is the optimal replacement ratio.Then the applicability of the combined routing algorithm for different injection flows is analyzed.Then the performance of the combined routing algorithm and the specific situation of optimizing the network power consumption is analyzed.Finally,the stability of the algorithm are analyzed from the perspective of deadlock-free,live lock-free and hunger-free.In this thesis,the Noxim simulator is used to simulate the proposed combined routing algorithm under the 8*8 Mesh structure in random,shuffle,transpose1 and transpose2 traffic pattern.The simulation results show that the delay of the combined routing algorithm is 3.5%-4.1% higher than the NoP algorithm and 4.15%-4.9% higher than the CRA algorithm.The combined routing algorithm throughput is 2.8%-4% lower than the NoP algorithm throughput and 3.1%-5% lower than the CRA algorithm throughput.The combined routing algorithm consumes 11.2%-13% less power than the NoP algorithm and 8.5%-10.6% lower than the CRA algorithm.The algorithm implemented in this thesis reduces the power consumption of the networkon-chip at the cost of little reducing the throughput and increasing the delay.The combined routing algorithm implemented in this thesis can reduce the power consumption of the network on the premise without affecting the network performance in practical engineering applications.
Keywords/Search Tags:network-on-chip, routing algorithm, combined routing, power consumption, energy-performance product
PDF Full Text Request
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