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Study And Implement Of Energy Efficient Routing Algorithm Based On Network On Chip

Posted on:2008-01-07Degree:MasterType:Thesis
Country:ChinaCandidate:H SongFull Text:PDF
GTID:2178360245497950Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
As VLSI technology develops, and the number of modules on a chip multiplies, on-chip communication solutions are evolving in order to support the new inter-module communication demands. Traditional solutions, which were based on a combination of shared-buses and dedicated module-to-module wires, have hit their scalability limit, and are no longer adequate for sub-micron technologies. Current chip designs incorporate more complex multilayered and segmented interconnection buses. Network-on-chip (NoC) was shown to be effective for solving the global interconnect problem among modules. The future chip design will incorporate a full-fledged NoC, consisting of a collection of links and routers and a new set of protocols that govern their operation.In this paper, we explore several routing technologies on different chip network topology especially regular 2-D mesh and irregular 2-D mesh under the energy constraint. In the VLSI design, the most important issue is to reduce the power and improve the performance and as a result the routing technology design is inevitably influenced by the both factors. This paper first analyzes the existing communication energy model and points out that the model didn't take into account the actual communication status of network and was not an accurate reflection of the energy consumption of communication. Therefore the communication delay which has a tremendous impact on the energy consumption is taken into account on the basis of previous model. Finally a new communication energy model which can better reflect the actual network status is build. From the model we can get much more accurate information about the energy consumption of network-on-chip.In the regular 2-D mesh, previous routing algorithms are almost deterministic routing. After studying the shortest path algorithm, the SP-Based adaptive Contention-Look-Ahead Routing Algorithm is proposed based on the comprehensive consideration of transmit data relevant, communication conditions between resource node and the network real load. The algorithm allocates the routing path through the analysis of the communication status between resource nodes and the communication task order, dynamically selects the routing path according the network load during the data transmission. It optimizes the overall executing times of the actual application and minimizes the system energy consumption by performing routing path allocation and routing based on the network traffic on NoC. The evaluation shows that the algorithm is very efficient in solving the routing problems in dynamic networks and large scale networks.In the irregular 2-D mesh, a routing table cost model is proposed and can be used as the key indicator of routing algorithm performance evaluation. Under this model, a degree priority XY deviation table routing algorithm which can optimize the hardware is proposed. The evaluation shows that the algorithm can effectively reduce the routing cost through the combination of deterministic routing (XY routing) and reducing the routing table of distributed routing.
Keywords/Search Tags:Network-on-Chip, energy model, adaptive routing, routing table cost model
PDF Full Text Request
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