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Design And Implementation Of Embedded Block RAM IP Soft Core For FPGA

Posted on:2020-06-18Degree:MasterType:Thesis
Country:ChinaCandidate:L XuFull Text:PDF
GTID:2428330602952183Subject:Engineering
Abstract/Summary:PDF Full Text Request
Intellectual property(IP)soft core is a logical file,which describes the functional module of field programmable gate array(FPGA)using hardware description language.The high flexibility and portability of IP soft core make it have good sustainability and replicability.In the application process of FPGA,the rational design of IP soft core can overcome the defects induced by the insufficient hardware design.Based on the reusability of IP soft core in developing FPGA,it desings a software tool to directly generate the required IP soft core,which further simplifies the design process of FPGA.This paper studies the structure of embedded block random access memory(BRAM)in FPGA and the design flow of IP soft core.Based on that,the traditional design method of IP soft core is optimized.Furthermore,the improved design method is realized by writing program.The main contributions are as follows:Firstly,this paper introduces the theoretical basis involved in the design of IP soft core.It illustrates the basic theory of FPGA,including hardware structure,operation principles and delay analysis.At the same time,referring to the design process of IP soft core which is commonly used in the industry,the design process of embedded BRAM IP soft core for FPGA is introduced in detail.Secondly,this paper studies the design method of embedded BRAM IP soft core for FPGA.An improved IP soft core design method is proposed,which is based on the traditional IP soft core design method and circuit structure of embedded BRAM.In the design,the working frequency is improved through spreading the frequently used data bits to reduce the working time of a single BRAM.The designed IP soft core has been tested by functional simulation,and experiment result has shown that it can meet the functional and performance requirements.Finally,this paper applies the improved IP soft core design method to complete the design of software tool.The extensible markup language(XML)is used to describe the basic information,port information and configuration information of IP soft core,then it presents an intuitive graphical interface for users to set parameters.The improved design method of IP soft core is achieved by C++,and it can generate the appropriate IP soft core with parameters set by users.The designed software has been tested,and the results have shown that the designed software can manage,classify and generate IP soft core.
Keywords/Search Tags:FPGA, Embedded block RAM, IP soft core, High speed, XML
PDF Full Text Request
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