Research On The Sample And Hold Circuits, Current Comparator Circuits Of Current Mode Pipelined ADC

In recent years, with the rapid development of digital signal processing, High-technologyfield of digital process is definitely accelerating. Analog-to-Digital Converter (ADC) is aninterface circuit of converting analog signal to digital signal, which is widely used especiallyin the field of software radio technology and wireless sensor networks, the ADC has becomeone of the bottlenecks of the modern electronic system.Based on reading a lot of related paper of current mode ADC, the basic structures ofcurrent-mode ADC are analyzed and compared. Because of pipelined ADC’s bettercompromise of converting resolution, converting rate and hardware consumption; In addition,current mode pinelined ADC can transfer the current signal directly, which can omit thecurrent-voltage conversion stage. So this paper mainly researchs and designs the sample andhold circuit and the current comparator for the current mode pinelined ADC, combined theworking principle and the performance index of the unit circuit, the main related new workconsists of the following aspects:(1) A current Sample and Hold circuit is proposed. The circuit is based on currentcontrolled the Second Generation Current Conveyor, which can tune the parastic resistor ofthe port X, using the CMOS transmission switch to improve the nonlinear resistance andinhibitory the effect of charge injection. The proposed sample and hold circuit can achievehigh sampling accuracy at the sampling frequency of400MHz, which is suitable for thefront-end of sampling and holding application in current-mode pipelined ADC, The proposedcircuit structure has better performance compared with the recent published current sampleand hold circuit design.(2) A current comparator for current mode pinelined ADC is proposed, The comparatoruses the improved Wilson current mirror, which not only can realize the subtraction functionof the input current and the reference current, but also the structure can bring negativefeedback regulation mechanism, the circuit has the lower input impendence and shorterresponse time. Using resistive load amplifier of three serials, the middle stage can acceleratethe small difference input current of quantification comparing, finishing the process of currentsignal quantification with high speed. The proposed circuit has better performance comparedwith the recent published current comparator circuit design.With the standard CMOS process of TSMC0.18μm, the unit circuits of current modepipelined ADC are simulated by the HSPICE software. The simulation results show that the proposed circuits of this paper can definitely meet requirement of the current mode pipelinedADC.