Research On Virtex-6 FPGA Resources Processing And Packing Based On VPR

With the development of the information age,FPGA chips in the commercial field have also made great progress.Each major FPGA chip company has a matching CAD software development platform.Due to the technical blockade,it is particularly important to design a CAD software system with independent intellectual property rights.The study of FPGA in academic field only focuses on algorithm optimization and architecture.The academic field studies abstract chips,and it is difficult to apply the research results of the academic field to the actual commercial chips.This paper makes an in-depth study of the structure and hardware resources of commercial FPGA chip,and uses structured description language XML to model the FPGA chip.In addition to the existing modeling tags,two new tags are added to describe the airspace and hardware connection of the chip.It increases the description ability of the chip modeling file.Again I studied the open source software VPR and made some appropricate modification in BASE of the information module and PACK of the pack module.The modification of content is divided into two parts,the first is the BASE of the information processing module in VPR to the information extraction and information detection of the chip,and modify the code and make it can complete the xc6vlx240tff1176 information extraction and information detection of the chip.The second is to study and modify the packing process of PACK of the pack module in VPR.The goal of modifying the code is to successfully complete the packaging process of the circuit on this specific chip for different circuits after completing the information extraction and information detection for specific chips,and to successfully generate.net files,which will provide help for place,route and bitstream generation.This paper also tests the chip modeling file and the BASE of the information processing module and PACK of the pack module based on specific chips.The experimental results show that the modified VPR can complete the information processing and packing process on the xc6vlx240tff1176 chip.Finally,the same circuit is packed and tested with ISE tools.The results show that the average packing time of ISE is 12% faster than that of VPR for large scale circuits.