Research On Solution To Void Defects Induced By High Density Plasma Chemical Vapor Deposition Gap-filling Shallow Trench Isolation

CVD(Chemical Vapor Deposition)is widely used to deposit oxide film,nitride film,tungsten,etc..In state-of-the-art wafer fabrication factory,STI(Shallow Trench Isolation)gap-filling is an important application of dielectric CVD.Generally,HDPCVD(High Density Plasma Chemical Vapor Deposition)or HARP(High Aspect Ratio Process)is applied to STI gap-filling process because of their good performance in high aspect ratio gap filling.Nowadays,the most popular 55 nm technology CIS(CMOS Image Sensor)products STI gap filling process cannot select high temperature mode,because deep well implant has done in photodiode area.Therefore,HDPCVD is preferred alternative instead of HARP.However,HDP process gap fill capability is less marginal,so it tends to form void defects in the middle of trench.The STI HDP void issue was the one of the biggest challenges in mass production.This paper was focus on researching related information of void defects,including the void defects formation mechanism,process effect factors,optimizing methods and defects eliminated solution.Meanwhile,based on theoretical knowledge about void defects reduction model,a series of related experiments about HDPCVD process such as dep-etch cycle times,dep/etch amount and chamber clean frequency were planned.What's more,AA photo and etch process key parameters such as STI trench width,depth,profile condition and so on were also taken into account.According to all kinds of experiments data,the best conditions of void defects reduction were updated to process flow in order to eliminate the ring defect map void defects and decrease the SRAM yield loss from about 30% to 2%,and the CP result gains about 30%.The yield target meets the requirement of mass production.