Design And Implementation Of Digital System Of The Band-Width Signal Tranceiver

A huge variety of modern technologies of Radar and communication is developing rapidly,which leads growing demand in test and maintenance.However,conventional test instruments face disadvantages include high cost,difficulties in building test system and a lack of ability to fully fitting the test requirements.Wide-band signal transceiver that combine the ability of receiving and generating signal carrying programmable digital processing module can integrate the functions of several conventional instruments,which will lead to decrease in the flexibility of the test system as well as increase of indexes such as signal tracking speed.As a result,wide-band signal transceiver is making a figure in Radar testing.The thesis take PXIe-5646 vector signal transceiver(VST)from National Instrument Co.as its IF module,Secondary development of programmable digital logic of the VST is made using NI LabVIEW development environment.With the self-designed hardware circuit of clock generation module and interface to extend its function and increase its performance,wide-band signal transceiver is set up to reach the requirement of a large types of Radars test.The main research contents of this design are as follows.1.According to the requirements of the context and functions,Architecture of the wide-band signal transceiver is designed and significance and requirements are analyzed in order for a guidance to the design scheme of the functional components of the wide-band signal transceiver.2.Digital logic scheme of the IF module is designed at first,with the architecture of the digital logic of the signal memorization and retransmission and the digital logic implementation of a large class of different pulse modulations,radar target distance simulation and radar target speed simulation and dual-channel test function followed.3.According to the analysis of the clock signal requirements of the components of the wide-band signal transceiver and the study of the characteristics and the theory of dual-loop charge pump phase knock loop(CPPLL),the scheme of the clock generation module is chosen and the hardware printed circuit board(PCB)of the clock generation module is designed.4.According to the analysis of the requirements of the interface of the wide-band signal transceiver,Interface hardware circuit including interface of PXIe interface,SPI interface and pulse signal interface is designed.With the research on items above,work on design of signal memorization and retransmission architecture,implementation of the function include pulse modulation,target distance simulation,target velocity and the dual-channel model and test and validation on functions and thesis have been done,which leads to a reliable band-width signal transceiver.