Research And Design Of Reference Source Network For Image Sensor Readout ADC

In recent years,with the demand of military and civilian markets,image sensor and image sensor readout circuits have been widely used,which makes the design of image sensor readout ADC develop rapidly,and at the same time,the requirements of circuit performance are constantly improved.As the basic scale of ADC circuit,reference source network provides stable and high-precision bias voltage and bias current for image sensor readout ADC,which fundamentally determines the overall power consumption and stability performance of ADC circuit.Therefore,the design of high-precision,low-area and low-consumption reference source network is very important for the development of image sensor readout ADC.Based on the standard CMOS technology of GSMC 0.13?m,a novel bandgap reference voltage source and current source circuit are designed in this paper.Compared with the traditional circuit structure,each circuit improves in accuracy,power consumption and cost,and meets the performance requirements of high performance hybrid signal integrated circuitsBased on the traditional bandgap reference circuit structure,this paper optimizes the operational amplifier offset voltage and operational noise voltage.A new circuit structure is proposed,which can be used in low voltage environment to significantly reduce the impact of operational amplifier offset voltage and operational equivalent input noise voltage on the reference output voltage,and the output voltage can be arbitrarily adjusted.The simulation and theoretical analysis show that the lowest operating voltage is 0.8V,the temperature coefficient is 26 ppm/?,the power rejection ratio is 102.45 dB,and the power consumption under TT is 10.88?W.Compared with the traditional structure,this structure reduces the influence of operational amplifier misalignment and noise on the reference output voltage by 88.5%.In this paper,an on-chip all-MOS reference current source is designed based on current summation mode.The on-chip positive temperature coefficient current and negative temperature coefficient current are compensated by using the sub-threshold characteristics of thick gate oxide MOS tube and standard CMOS tube provided in the process.The simulation results show that the lowest operating voltage is 0.8V,the temperature coefficient is 298ppm/?,the output reference current is 2.7?A,the total power consumption under TT is 3.2?W,and the effective area of the layout is 0.00285?m~2.