Baseband Digital Predistortion System Of Wideband Nonlinear Power Amplifier Research And Implementation

The power amplifiers' inherent nonlinearity has a significant impact on contemporary wireless communication transmitters.To solve the contradiction between linearity and efficiency of power amplifiers,extensive research is carried out.Digital baseband predistortion has become the most popular linearization technique for commercial base station to compensate the distortion of power amplifiers because of its flexibility and low cost.The predistorter in this thesis is first validated by simulation in MATLAB and then implemented in FPGA.The FPGA implementation issues with low complexity are presented after models and algorithms are analyzed detailly.Firstly in MATLAB,memory polynomial is used as the predistorter model to compensate various power amplifier models combined with RLS LMS and NLMS algorithms.The original loop delay estimation algorithm and a Crest Factor Reduction technique are validated by simulation results.Then this thesis attaches importance to wideband digital predistortion system based on downsample.Compared with other wideband digital predistortion systems,the technique used in this thesis can greatly reduce the speed of ADCs to save cost and lower the complexity of hardware implementation.Thirdly the VSG-FSA test bed is built up to carry out physical verification using WCDMA and LTE signals.Finally system generator is used to design the digital predistortion system based on LUT and NLMS algorithm;a digital predistortion system using memory polynomial and multi-channel digital up conversion are implemented in FPGA.