Research On A Miniaturized Ka Band Tracking Receiver

During the development from 2008 to 2016,China has established the first generation of the relay satellite communication system covering the whole world,and provided data relay services for Shenzhou series spacecraft.This system is an important part of China's information construction and spatial information transmission.In order to realize the data transmission between the communication satellite and the spacecraft,it is necessary to ensure that the antenna pointing is quick and accurate,which requires automatic tracking technology to improve the pointing accuracy of the antenna.The miniaturized Ka-band tracking receiver studied in this thesis is the core single machine in the automatic tracking system.The satellite load will be developed in the direction of miniaturization and light weight,which puts forward new requirements for the stand-alone design.This thesis presents a design scheme of miniaturized Ka band tracking receiver.The design of the stand-alone is divided into three parts,including RF module,IF module and power module.The RF module integrates the functions of low noise amplifier,single channel modulator and down converter into the tracking receiver.In the design of the stand-alone unit,the sum signal and the difference signal pass through the Low-noise amplifier first,and then the overall design of single-channel synthesis is carried out.This can reduce the influence of single-channel synthesis on the noise figure of the receiver.At the same time,the stand-alone unit selects the low noise indium phosphide MMIC(Monolithic Microwave Integrated Circuit)chip with small noise figure and easy matching as the front end of the Low-noise amplifier,and adopts the multi-chip assembly technology(MCM: Multichip Module)to realize the cavity encapsulation to reduce the crosstalk between signals and ensure the space isolation performance of the channels.The modeling and simulation of the used devices,signal connections and circuit topology verify the feasibility of the circuit.The IF module filters the received signal and downconverts it to a fixed IF of 40 MHz.The IF amplifier with AGC is used for data processing by the IF processing unit,which takes FPGA as its processing core.The power module circuit converts the primary bus voltage into various stable voltages required by the extension unit.After design and production,the single machine is tested,it can meet the requirements of error signal output level-5V ~ + 5V and carrier lock-in time?5s in the range of received signal level-130 dBm ~-90 dBm,and branch,differential branch input standing wave ratio?1.5.The weight of the whole machine is reduced from 8.08 Kg to 2.61 Kg.The exprerimental data also verify the feasibility of the proposed scheme.