Design Of Baseband Data Processing Module For Monitoring Receiver

With the continuous development of radio communication technology,various kinds of infinite communication equipment,including television broadcasting,mobile communication,radar and so on,are widely used.As a result,the radio electromagnetic environment will become more and more complex,and the spectrum resources will become scarcer.In order to safeguard a more efficient and secure communication environment,it is necessary to develop a spectrum monitoring receiver with large bandwidth,large dynamic range and high resolution.Based on the full digital processing scheme,a baseband data processing module with spectrum measurement,analog demodulation and baseband I/Q data timestamp function is implemented in this dissertation.Firstly,this dissertation summarizes the basic principle of spectrum monitoring receiver.Secondly,based on the theory of digital bandpass sampling,digital down-conversion,decimation filter and other theories,it discusses the technology and realization of monitoring receiver based on the all-digital processing.The scheme includes band-pass sampling data receiving,spectrum analysis filtering,analog signal demodulation and baseband data timestamp module.1.With regard to the design of bandpass sampling data receiving,this dissertation uses 16 bits 250MSPS high-speed AD conversion chip to sample signals,aiming at achieving high spurious dynamic range and high signal-to-noise ratio measurement.Sampled data stream is received by high performance I/O BANK on the PL side of Xilinx ZynqMP SOC.Idelay and IDDR I/O resources are used to realize high-speed sampling data reception.2.For spectrum analysis module,the maximum IF bandwidth is 40 MHz and the minimum resolution bandwidth is 239 Hz by digital down-conversion and variable decimation rate CIC+HB filtering.The panoramic spectrum scanning is up to 40 GHz/s under the maximum IF bandwidth with RF circuit.For the detailed capture of specific signals,trigger acquisition can be set according to the signal characteristics.Once the trigger conditions are eligible,the data cached in DDR4 can be read according to the pre-trigger depth for detailed analysis.3.Digital IF demodulation scheme is used to demodulate analog modulation signals.For different modulation bandwidth signals,different decimation rates of quantized data are filtered to obtain baseband I/Q data streams.On this basis,different demodulation algorithms are used to demodulate analog modulation signals according to different modulation modes.4.With the help of external GPS module,the monitoring receiver can get accurate whole-second time information and pulse per second.The latter can get high-precision nanosecond time information with local high-stability crystal oscillator.The whole-second and nanosecond time information can be added to baseband I/Q data to realize baseband data timestamp function.This dissertation completes the logical realization of each module of the monitoring receiver,and uses signal generator and Vivado Logic Analysis(ILA)tool to verify the test results.The test results show that the design meets the design requirements.