Research And Implementation Of Low Complexity Detection Algorithm In Massive MIMO System

Recently,the fifth generation communication system?5G?has started the pilot run.As the key issue of 5G,the antenna number of massive MIMO system rises sharply compared with the traditional MIMO system.While getting better data transfer rate and spectral efficiency,it brings problems such as real-time data size rising.As an important part of massive MIMO,the detection module has high requirements on data throughput and detection performance.The research and implementation of low-complexity detection algorithm are very important.This paper proposes a MMSE detection algorithm based on LDLT decomposition and its hardware architecture for 128×8 massive MIMO systems.At the algorithm level,this paper optimizes the redundant multiplications of the LDLT decomposition algorithm,reducing its complexity.Furthermore,this paper also take special measures for the ill-conditioned matrix problem encountered in the simulation,to ensure that the algorithm can work normally under the fixed-point conditions.At the hardware level,LDLT decomposition algorithm has division operations,which is not hardware-friendly,so this paper replaces the divisions with the reciprocals and multiplications.In order to avoid the high resource consumption and long latency of standard reciprocal unit,this paper proposes a scheme to completely multiplexing the reciprocal unit by adjusting the latency,and a reciprocal architecture base on the Newton-Raphson iterative and symmetric bipartite table method,which significantly reduces the resource utilization of the LDLT decomposition architecture.In simulation results,the detection module proposed in this paper has a performance loss of about 0.7dB when the bit error rate reaches 10^-5 level,compared with the ideal MMSE detection.Finally,the proposed hardware architecture achieves a 1.296Gbps throughput with consuming 143k LUTs and 187k FFs on FPGA,resulting in better hardware efficiency than most related papers;Design Compiler synthesis result shows that the detection module utilizes 9.7mm² area under TSMC 0.13um technology,and reaches throughput of 1.2Gbps,which shows better area efficiency compared with related papers.