Algorithm And Hardware Acceleration Of Data Detection On Massive MIMO Systems

With the development of mobile communication,the requirement for mobile internet is diversified.On one hand,the applications like virtual reality or augmented reality make the data traffic increase explosively.On the other hand,the Internet of things?Io T?changes the definition for the scope of communication service,and mass different kinds of devices augment the nodes of network and make the structure of network complex and various.Driving by the mobile internet and Io T,the fifth generation of wireless communication?5G?technology is proposed to meet the demand of high speed,green,ubiquitous and intelligent communications.Massive multiple-input multiple-output?MIMO?is one of the promising wireless data transmission techniques for 5G,which improves multiplexing gain or diversity gain and provides high spectral efficiency and energy efficiency.However,more antennas bring about larger scale matrix to be handled by signal processing,which induces unacceptable complexity.So it is an important research topic about low complexity approximate algorithm for signal processing.Matrix inversion is the critical procedure of signal processing algorithms like channel estimation,data detection and precoding.Thus,this thesis proposes low complexity high precision approximate iteration algorithms about matrix inversion,and design the hardware accelerator based on the feature of these approximate algorithms.Because both the precoding and detection algorithms are the techniques of interference elimination and almost the same,and are only deployed in different positions,so mostly we use detection as an example to introduce our work.In summary,this thesis makes the following contributions:1.We propose to adopt matrix inversion based on Newton iteration?NI?for massive MIMO system data detection.Then,making a trade off between complexity and precision,we propose diagonal band Newton iteration?DBNI?method.Compared with the polynomial expansion?PE?method,NI method converges very fast,and the more number of iterations it takes,the faster the precision converges.Meanwhile,the complexity of each iteration is constant,so it has better efficiency as the number of iterations increases.Concerning DBNI method,it has higher precision and comparable complexity against PE method.Moreover,DBNI method is available for small ratio of base station antennas and users number,so it has a wider range of application.What is more,NI and DBNI methods are suitable for joint channel estimation,detection and decoding algorithms based on iteration,which has better performance at the cost of lower complexity.2.We discuss about some approximate iteration detection and precoding methods and analysis their computation complexity.Then we combine the iterative refinement?IR?with these approximate iteration methods which are named as IR-based methods and are the combination of three approximate iteration methods in essence.Compared with four methods without iterative refinement,IR-based methods for detection and precoding provide 27%,44%,67% and 83% decrease on NMSE respectively if refining the error in SELF mode,and little complexity and no extra hardware is required.Moreover,we conduct experiments about NI and DBNI methods on BER performance with systems of hard decision decoder to analysis the effect of IR independently.Finally,we also discuss about the relationship between the approximate iteration inversion and soft decision decoder on BER performance.3.We design a hardware accelerator of matrix inversion in massive MIMO systems based on NI method.The accelerator has two structures: array structure and iterative structure.To balance the cost of hardware and the precision,we use Matlab to simulate the precision with different design parameters,and then choose the optimal bit width for fixed-point design.Then we introduce the NI₄x4 module,which is the fundamental module of hardware accelerator based on NI method.Based on the NI₄x4,we introduce the array structure NI₈x8 and the method of task partition and scheduling for iterative structure NI_iter.Compared with the hardware accelerator based on PE method,the array structure has better flexibility and supports more iteration for higher precision,and even if compared with the improved PE hardware accelerator,as the number of iteration increases,the hardware accelerator of NI method has lower latency and higher throughput.Concerning the iterative structure,it improves the flexibility further,which could work as the array structure when the task is small,or could finish the task through scheduling and reduce the latency by utilizing the characteristics of unitary symmetric matrix when the dimensions of task is bigger than the hardware array dimensions.4.We design a hardware accelerator of matrix inversion in massive MIMO systems based on DBNI method.The accelerator has two structures: array structure and iterative structure,and we focus on the iterative structure.To balance the cost of hardware and the precision,we use Matlab to simulate the precision with different design parameters,and then choose the optimal bit width for fixed-point design.Then we introduce the module Gram₄x4 and DBNIINV₄x5,which are the fundamental modules of iterative structure hardware accelerator based on DBNI method.Then we introduce the method of the task partition and scheduling,and detail the structure of the control module.Compared with the hardware accelerator based on PE method,DBNI_iter module has higher clock frequency and less hardware resource,and it could support super-size task in an iterative mode,so it is suitable for the scene with dynamic size of task or scarce hardware resource.Compared with the NI_iter module,the DBNI_iter module reduces the latency of some modules utilizing the characteristics of algorithms,and improves the throughput by uncoupling the process of calculating the Gram matrix and the matrix inversion.In summary,this thesis has a deep research on approximate iteration detection or precoding algorithms of massive MIMO systems and designs corresponding hardware accelerator,which lays the foundation for the practicability of massive MIMO baseband processors.