The dissertation gives introduction of the application background and mechanism of non-volatile memory product,including programming,reading and erasing operations.The dissertation tells a real testing low yield problem in real manufacturing.Failure analysis reveals the failure is induced by poor UV erase performance of non-volatile memory.Based on engineering analysis and research,an innovative and proven effective wafer probe test is introduced to monitor the problem.With the testing failure rate as a sensitive index,relative process parameters and processes,including thickness and reflection index of the passivation layer are included into the discussion.Process skew silicon run was performed to review the sensitivity between the parameters and product erase performance.The result guides adjustment of manufacturing settings: Reduced failure rate from 12% to below 0.1%,solved the erase problem and finally improved product test yield.The conclusion of this dissertation could also be reference in other engineering topics in integrated semi-conductor manufacturing domain. |