Design And Implementation Of QSPI-Flash Controller For Secure Storage In IoT

With the development of the Internet of things industry,the data processing capacity is getting larger and larger,and the requirements for data storage and reading and writing speed are getting higher and higher,which is more and more demanding for storage devices.Flash as a quality storage device in the application of the Internet of things,the most widely used,but once the Flash stored user data is lost or stolen,the data stored in Flash may be read illegally,causing information leakage,so the security of data is a Flash storage must consider the problem.In the use of Flash as a storage medium of the application,generally will use Flash controller to access Flash,in order to improve the access efficiency.However,most Flash controllers on the market do not have encryption capabilities,which means that there is still a risk of data leakage.This paper designs a qspi-flash controller with encryption function based on the problems analyzed above.This control supports the QSPI interface,namely the four-line SPI mode,which greatly improves the efficiency of data transmission.For the problem of data security,this paper adds the key generation function and encryption function in the design to encrypt the data.Even if Flash is attacked,the attacker can only steal the ciphertext,which is meaningless for the attacker,so it will not cause losses to the user.In this paper,first of all,according to the function of qspi-flash controller,circuit design is carried out to form RTL code.Then,functional simulation and FPGA prototype verification are carried out for RTL code.All the functional simulation instructions pass,and the encryption and decryption functions also pass.The FPGA prototype was also verified,and compared with the designs in several other literatures,the design in this paper is relatively better in terms of safety and speed.After the verification,ASIC implementation of the design was carried out based on huahong 0.11 um process,logic synthesis,formal verification and static timing analysis were carried out,and circuit performance was analyzed.In this paper,based on huahong 0.11 um process,the digital part of the design is implemented by ASIC.The circuit area of the digital part is 68020um2,the highest clock frequency of the system is 200 MHz,and the dynamic power consumption is 3.7632 mW.Its security and reading and writing speed are better than most Falsh controllers on the market.