The Reading Writing Control Scheme And Peripheral Circuit Design Of 3D-Xpoint Phase Change Memory

Traditional memory encounters economic and technological bottlenecks in its development.As one of the new types of memory,3D-Xpoint phase change memory is likely to become the next hot spot in the development of memory.Compared with traditional phase change memory,3D-Xpoint phase change memory has a very different array structure and operation mode.The memory cell of the traditional phase change memory is usually 1T1 R structure,which is a three-terminal device and the selection excitation and programming excitation can be applied to different ports of the memory cell at the same time.As for the 3D-Xpoint phase change memory,its memory cell is 1S1 R structure,which is a two-terminal device.And the types of selection excitation and programming excitation are different.During the operation,the excitation can only be input from two ends of the memory cell.At the same time,due to the increased density of the 3D-Xpoint phase change memory array,the parasitic capacitance of the array is larger than that of the conventional phase change memory.During the operations of read and write,the delay is longer when the reading writing control scheme and peripheral circuits of the traditional phase change memory is applied.Therefore,it is necessary to propose a reading writing control scheme for the 1S1 R phase change memory cell,and design a peripheral circuit based on the reading writing control scheme to realize the fast read,write and erase functions of the 3D-Xpoint phase change memory.In this paper,the Verilog-A behavioral model of 3D-Xpoint phase change memory array is established based on the material characteristics and array structure of 3D-Xpoint phase change memory array.Then,according to the operation mode and structural characteristics of the memory cell of 3D-Xpoint phase change memory,the reading writing control scheme of 1S1 R phase change memory cell is proposed.Such scheme proposes an operation mode realize the selection and programming of memory cell by switching the input excitation.Moreover,according to the characteristics of the new selector,the reading scheme is determined by judging the state of the selector,and the data judgment resistance window is expanded which reduces the misreading rate.Meanwhile,the reading process and the selection process are combined based on the characteristics of the reading scheme,which simplifies the write-after-read programming scheme.After that,according to the reading writing control scheme of 1S1 R phase change memory cell,the phase change memory peripheral circuit of 3D-Xpoint is implemented.The peripheral circuit can be divided into digital control module,voltage bias module programming current generator module,SA module.Digital control module is designed based on state machine and ring oscillator to realize the steps in the 1S1 R phase change memory cell reading writing control scheme.This module is the core module for implementing the reading writing control scheme.Programmable current generator module reduces the fall time of Reset programming current by current divider circuit which reduces the influence of parasitic capacitance.SA module reads data based on full differential sense amplifier and accelerates the process of charging the parasitic capacitance to the read voltage through the pre-charging circuit,which shortens the reading time.Each excitation is connected to the memory cell through the switch,and the input excitation is switched according to the control signal output by the digital control module to complete the operation.Finally,the back-end design of the peripheral circuit is carried out using the CSMC 0.18?m CMOS process.Simulation of 3D-Xpoint phase change memory peripheral circuits is carried out based on the behavioral model of 3D-Xpoint phase change memory array.The simulation results show that the peripheral circuit can successfully realize read,write and erase functions of 3D-Xpoint phase change memory.When parasitic capacitance of the bit line is 2.5pF,the peripheral circuit cost about 60 ns to read.And the shortest writing time is 60 ns,the longest is 280 ns.The shortest erasing time is 60 ns and the longest is 100 ns.