A Design Of Configurable Gated Sampling Photon Counting Readout Circuit

With the rapid development of science and technology,the ability of humans to explore and study "things that are not visible to the naked eye" has been gradually improved.Among them,single-photon detection and counting imaging is one of the typical examples,With the continuous innovation of semi-conductor materials,devices and circuits,the detection capability of micro-light detection technology has been greatly improved and its application range has been broadened.Among them,the SiC APD detector is sensitive to weak UV light,and it plays an irreplaceable role in the application of high-voltage equipment fault detection.As the size of APD arrays gradually increases,the effects of non-ideal factors such as pixel crosstalk,parasitic effects,and noise interference gradually increase,and the design and optimization of large array ROIC readout circuits are faced with even greater challenges.In order to realize the high detection rate under different light intensity conditions,this thesis designs a digital photon counting readout circuit with configurable detection mode,which can be integrated with 1x8 line SiC APD interconnects.Firstly,this dissertation analyzes and explains various factors affecting the photon detection rate.Based on the fixed gated detection mode and the idea of time and space coupling,A complementary gate detection mode was proposed to control the original two pixels to work alternately,equivalent to a new single pixel,to ensure high detection rate under strong light conditions.The high detection rate,and complete the design of the corresponding working sequence under the large array system and the design of the ROIC readout circuit.Secondly,in order to meet the different demands of each module on the clock frequency,a lock-locked frequency locked loop clock circuit is designed,and generates a 50%duty cycle clock with a frequency of 50 MHz and is used by ROIC after multi-frequency processing.On this basis,complete ROIC module circuit design and overall system layout arrangement.Finally,according to the testability requirements of the chip,complete the circuit and layout design of the ROIC overall system.The ROIC readout circuit designed in this thesis is fabricated on TSMC 0.18?m CMOS process.The pre-simulation of the system circuit and the post-emulation of the key module circuit were completed through the Cadence EDA tool,and the MPW tape and chip tests were finally completed.The 1×8 array chip layout area is 1576?m×996?m.The system uses 1.8V and 5V power supply voltages,and its overall power consumption is 8.6mW.The chip test results show that the key modules of the ROIC system function is properly.Under the low-light conditions,that is the average photon time interval is much larger than the fixed dead time,the detection rate of both detection modes becomes higher as the light intensity gradually weakens,and eventually approaches 100%;However,Under the strong-light conditions,where the average photon time interval is close to or even smaller than the fixed dead time,the detection rate of the fixed gated detection mode gradually drops below 50%,but the detection rate of the complementary gated detection mode can still be maintained above 80%.Finally,this thesis completes the functional verification of single-wavelength UV imaging and positioning,and the results meet the application requirements of corona detection.