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Research On Selective Re-computation For Write Optimization In NVM

Posted on:2020-10-24Degree:MasterType:Thesis
Country:ChinaCandidate:R HuFull Text:PDF
GTID:2428330590458331Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
Data growth brings opportunities and challenges to computer storage systems.Traditional DRAM technology faces difficulties in system stability and data reliability due to cell scalability and refresh power consumption problems.Emerging Non-volatile Memory(NVM)technologies are considered as promising candidates for next-generation memories due to high storage density,non-volatility and high scalability properties.Exploiting NVMs to construct new storage systems is expected to overcome the performance bottleneck between CPU and memory,and meet the demand of large capacity persistent main memory.Non-volatile memory devices generally suffer from limited write/erase cycles and higher write latency relative to DRAM.There are many technical methods that have been proposed in the existing research work to improve the lifetime of NVM,such as write operation optimization and wear leveling.However,frequent data writes affect the lifetime of the NVMs and reduce the performance of the system.Selective Greedy Recomputation(SGR)is proposed to reduce the amount of volatile temporary data written to NVMs by recomputing the results of code blocks.By combining greedy and exhaustive algorithms,a counter based greedy algorithm is proposed to provide fast judgments in the temporal consumption of storage and recomputation.Therefore,SGR opportunistically stores the results when the computation is slow and the reuse occurs at runtime.The recomputable data which are originally written to memory are discarded and the system re-executes the slices to produce the data when needed.Since the read-write latencies are asymmetric and the speed of memory access lags behind that of the processor,the temporal consumption of storage is more expensive than recomputation.SGR scheme is assisted by the GCC compiler and carries out the experiments on Quartzs,a lightweight DRAM-based NVM simulator,to verify the feasibility via powerstone benchmark suite.The experimental results show SGR reduces the number of writes of volatile data and achieves speedup in execution time.
Keywords/Search Tags:Non-volatile memory, Recomputation, Compiler
PDF Full Text Request
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