Research On Control Strategy Of Four Hybrid Operationswith Multiple Operators And Its Application In PLC

Small PLC is mainly used in industrial control.For complex control algorithms and high-precision data processing,the control precision of small PLCs is often limited.The small PLC with floating-point number four mixed operations computing functions can improve the control precision.Therefore,it is of good practical significance to study the implementation of four mixed operations multi-floating operations.This topic uses the parallel execution of FPGA to realize the multi-operand four mixed operations function.In the ARM+FPGA architecture small PLC,the FPGA does not affect the execution process of the PLC user program during the floating-point operation,just the floating-point operation process.The data preparation and the reading of the floating-point operation result will occupy the execution time of the PLC,which can effectively improve the calculation speed of the PLC.This article mainly does the following work:(1)For the circuit structure of multi-operand four mixed operations control using bus mode,study its control strategy,determine the transmission mode of instruction and operand,address storage control module and multi-operand single-precision floating-point arithmetic.The principle of data transfer between computing modules,the execution of arithmetic instructions and the processing of multiple floating-point data.A multi-operand four mixed operations internal module operation instruction set and an address storage control module data transmission instruction set are designed.(2)The internal structure of the address storage control module is designed,including four modules: instruction data cache,main controller,memory and register file.It has multiple addressing operations,which can realize the mutual transmission of data inside the module,organize the multi-floating operands involved in the operation,and explain the working principle of the addressing storage control module.(3)Completed the internal structure design of the multi-operand single-precision floating-point arithmetic operation module,and designed the accumulation register,the modulation control,the data distribution module,the result flag register,the queue,the floating point operation,and the floating point conversion point by modularization.Eight modules are fixed to floating point.After receiving the operation instruction sent by the central controller,the arithmetic operation module can independently perform four operations of addition,subtraction,multiplication and division in single precision mode,and 32-bit floating point number and The 32-bit fixed point numbers are converted to each other.(4)Design the timing of the serial interface of the peripheral analog input A/D conversion module of the FPGA control module.Under the system clock and internal timing control,verify the correctness of the designed conversion module timing function,in order to realize the FPGA signal.The collection process is ready for work.(5)For the designed module,select Altera's Quartus ? 13.1 programming environment,first perform functional simulation,pass the timing simulation,and finally download to the Cyclone ? EP4CE115F23I7 N chip for board level verification,and analyze the signal of the timing simulation diagram.Flow direction and board level verification results can achieve its function.