Codesign Of Ultra-wideband CMOS Limiter And Low Noise Amplifier

With the urgent need for high data rate transmission capability of wireless communication,high-frequency and ultra-wideband technologies have become more and more research hotspots.Monolithic microwave integrated circuit(MMIC)technologies are widely used in high-performance circuits owing to their superior noise and power characteristics under microwave frequency.Among different blocks in a transceiver,low noise amplifier(LNA)is one of the key components,which amplifies the received radio frequency(RF)signals.Meanwhile,LNA is also the first block in most receiver links—This makes the LNA more vulnerable to be interfered and damaged by high-power input signals.Therefore,limiters are employed to protect LNA and receiver chain from being affected.In addition,small-signal operation of the LNA and receiver chain should not be influenced by limiter insertion neither.Thus,small-signal insertion loss of the limiter must be as small as possible to minimize its impact on overall noise figure(NF)and gain of the receiver.In this paper,the codesign of the CMOS ultra-wideband limiter and low noise amplifier is studied,and the complete design flow is proposed.The main research works are as follows:(1)Ultra-wideband limiter circuit design:Through the analysis of microstrip line theory,matching network and limiter topologies,the influence of different parameters of PIN diode on the performance of the limiter is studied according to the working characteristics of PIN diode limiter.After discussing the influence of the number of cascade limiter on the performance of the limiter.The circuit structure of the four-stage cascaded PIN diode limiter is determined and simulated.In addition,a new MOS-based limiter is proposed to increase power handling.(2)Ultra-wideband LNA circuit design:Based on the noise theory,matching network and different amplifier topology analysis,a variety of ways to expand the bandwidth are proposed—1)a bandpass filter is connected in series at the input to increase the bandwidth of the input matching by increasing the poles and zeros;2)extending input matching bandwidth with pre-7c matching network;3)using the shunt-shunt resistance feedback technique to reduce the quality factor of the input,thereby increasing the bandwidth of the input impedance matching network;4)using shunt-peaking technology at the output to expand the output matching bandwidth;5)adding an inductor in series with the gate output of the cascade stage to expand the gain bandwidth.The design of the actual wideband LNA in this paper should be the combination of the above methods to achieve the optimal results for each parameter.(3)Ultra-wideb115and limiter and LNA circuit codesign:In the codesign of the limiter and LNA,the output of the limiter can be directly matched with the input impedance of the LNA to achieve smaller chip area and higher performance.Based on SMIC 40nm CMOS technology,this paper designs and implements two kinds of limiter based on PIN diode and MOS,and two kinds of ultra-wideband LNAs.The high-performance codesign method is verified through the analysis of the simulation results,both pre-and post-simulation results,layout design of LNA are provided.For the codesigned of ultra-wideband limiter and low noise amplifier,the circuit simulation results show that in the 2.2-19.2 GHz band where S11 is lower than-10 dB.In the 3.5-19.0 GHz band,the gain is higher than 8 dB,and the NF is lower than 5 dB.When the input power is less than 50 dBm,the output power of the circuit can be limited to 20 dBm.