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Research And Design Of High Speed Digital Isolator

Posted on:2020-10-19Degree:MasterType:Thesis
Country:ChinaCandidate:G D ShiFull Text:PDF
GTID:2428330572967299Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Electrical isolation separates the low-voltage domain system from the high-voltage domain system at the physical layer.There is no direct connection between the two ends.The signal or energy is transmitted between the high-voltage domain and the low-voltage domain through coupling.Isolators are widely used in industrial control,automotive electronics,medical electronics,etc.where high voltage and low voltage domains need to be isolated.This paper proposes a 200Mbps 5kVRMS VIOTM 4-channel high-speed digital isolator based on an on-chip capacitive isolated transmission architecture using UMC 0.18um standard CMOS process.In order to improve the anti-interference performance,the chip transmitter(TX)adopts an on-off key control(OOK)modulation architecture.In order to improve the matching degree between different channels on the chip,the TX of the chip adopts a high-speed Schmitt trigger with threshold voltage matching.The Schmitt trigger is used for signal shaping.At the same time,in order to improve the common mode transient immunity(CMTI),a receiver(RX)architecture based on envelope detection is developed.After a series of processes,such as circuit design,layout design,tape,package,and test,it is verified that the digital isolator chip based on this design can achieve a data transmission rate of 200 Mbps,a typical transmission delay of 8.2 ns,and a common mode transient immunity of 50 kV/?s and a instantaneous overvoltage(VIOTM)capability of 5kVrms.The results show that the design has complete functions and meets the expected specifications.
Keywords/Search Tags:Digital isolator, capacitor, on-off keying modulation, standard CMOS, delay, common mode transient immunity
PDF Full Text Request
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