Research And Design Of Capacitive Digital Isolator

Isolator refers to physical isolation of circuits through transformers,capacitors,and optocouplers to prevent DC and harmful AC currents from flowing between two parts of a system but allows signal and power transmission.Isolator can break the ground loops,protect equipment from surge,prevent operator from electric shock and shield stray signals,and is widely used in consumer electronics,communication system,transportation and industrial automation.With increasing demand for isolator by equipment manufacturers,it is of great significance to research and design safe and reliable isolators.This paper first elaborates on the basic principles and test methods of digital isolators,and then defines specifications of the isolator,and designs the architecture of the isolator based on specifications and adopts the on-off keying(OOK)modulation scheme as the signal modulation and demodulation scheme of the digital isolator.Based on OOK architecture,this paper proposes a signal transmission architecture: the transmitter(TX)adopts the OOK modulation scheme,and the receiver(RX)adopts the FSK demodulation scheme.Because the OOK modulation can eliminate the influence of signal edge jitter in the traditional OOK transmission architecture,and the FSK demodulation is sensitive to frequency rather than amplitude,this scheme can remove low-frequency transient commonmode Interference signals,so that the isolation chip achieves a good CMTI behavior.This paper has designed the circuit of two major modules of transmitter and receiver.The transmitter includes a mixer,a pre-driver and a driver.The mixer is implemented with digital logic making sure better reliability of data transmission.The pre-driver converts singleended signal to differential signal to improve CMTI performance of the isolator,the receiver includes a high-pass filter,a comparator,and a FSK demodulator.Second-order HPF can filter out low-frequency common-mode transient signals.The comparator can reconstruct the signal of which amplitude is attenuated after passing through the isolation barrier and convert the differential signal to a single-ended signal to prepare for demodulation,the FSK demodulator uses the frequency characteristics of the signal to further filter out commonmode transient interference and restore the signal.This paper has completed design,pre-simulation,layout,and post-simulation of the digital isolator circuit in HG?BCD350GE process.After Cadence simulation,the chip can work normally within power supply range of 3.3?5V,and temperature range of-40??120?.The maximum DR is 25 Mbps,the delay is 20.82 ns,the PWD is 10.11 ns.And with 15 p F capacitive load,5V power supply,and the maximum power consumption is18.91 m W.