Design And Implementation Of Low Latency Time-Aware System Based On IEEE802.1AS

With the application of multimedia entertainment systems and assisted driving systems,a large amount of real-time audio and video data needs to be transmitted through the network,which imposes higher requirements on time synchronization between network transmission devices.IEEE 802.1AS is a standard being developed in the 802.1 Working Group to provide precise timing and time synchronization for time-sensitive networks.It ensures the low latency and time synchronization of time-sensitive network data transmission by synchronizing the time of each node of the network to a common best master clock.However,the IEEE802.1AS protocol usually encounters two problems in its implementation.One problem is that the best master clock selection algorithm is difficult to implement between more than two network nodes due to the complexity of network multi-port scheduling and the limitations of network switching equipment.Another problem is that the path delay measurement is easily affected by the uncertainty of the delay of the operating system call and the asymmetry of the link transmission,resulting in a large measurement error,thus affecting the accuracy of the time synchronization.The thesis studies the IEEE 802.1AS precision time synchronization protocol in detail,analyzes the principle of the best master clock selection,path delay measurement and time synchronization in the protocol.According to the protocol content,a time-aware system model based on scheduled task queue scheduling is proposed.First,the software implementation of the protocol is completed by constructing a periodic task queue and a state machine jump interface on the Linux operating system.Secondly,through the multiport scheduling of the time-aware system,the best master clock selection between two or more network nodes is achieved.Then,combined with the actual software implementation,the causes of the path delay measurement error are analyzed.By determining and canceling the system call delay method,the delay measurement error caused by the system call delay is reduced.Finally,the NS-3 network simulation software was used to simulate the optimal master clock selection algorithm among different nodes in different network topologies.The hardware platform was set up to test the end-to-end path delay measurement and time synchronization under different network loads.Simulation results show that the multi-port time-aware system design can correctly select the best master clock in different network topologies composed of multiple nodes.Experimental results show that the time-aware system designed and implemented in this paper reduces the error of path delay measurement,and the time synchronization achieves sub-microsecond accuracy.