Power Distribution Network Analysis And Design In Time-domain For High-speed Circuit

With digital integrated circuit technology development to 10 nm even smaller size,high speed system clock frequency and transient current is improved,and the working voltage is coming down,which will further widen the voltage noise bandwidth and reduce the voltage noise tolerance.In addition,in contrast to the continuous improvement of technology,printed circuit boards and package interconnect technology relatively unchanged,due to parasitic effects,power distribution network under the condition of high frequency showed more prominent characteristics of inductance.Therefore,the analysis and design of power distribution network face more severe challenges.As one of the important parameters of power distribution network performance,power noise is closely related to the current excitation form of the chip.For the same power distribution network input impedance,different current excitation forms correspond to different power noise analysis expressions,and the time-domain analysis and design technology of power distribution network is different.Aiming at the common step current and triangular current in high-speed digital system,this dissertation puts forwards a voltage noise calculation and analysis technology based on simplified equivalent circuit of power distribution network and a capacitor selection method based on the effective decoupling rise time.The main contributions of this thesis are summarized as follows:1)Under the condition that the input current excitation is in step form,the power distribution network is simplified to a certain number equivalent circuits and the maximum error is deduced during the process of simplification.Meanwhile,the power supply noise is calculated based on simplified equivalent circuit,and the relationship between the maximum power supply noise and the rise time and he relevant capacitance parameters is analyzed quantitatively to determine the factors that influence the power supply noise amplitude,which lays an important theoretical foundation for power supply noise suppression.The correctness of this method is verified by comparison with the simulation results of software ADS.2)Under the condition that the input current is in the triangular form which is common is power distribution network,the critical rise time of the input current which needs to add decoupling capacitors and the effective decoupling rise time range of the capacitor are deduced.The relationship between the maximum voltage noise of the decoupling capacitor and the rise time and the relevant capacitance parameters is further investigated,and then the capacitor selection method based on the effective decoupling rise time is proposed.Compared with the frequency-domain decoupling method,the results of the decoupling design for 4 typical stimuli show that the number of capacitors can be reduced more than31.6%.Thus,the decoupling network is simplified and the design cost is reduced.