Investigation On Mechanism And New Structure Of Tunneling-fets With High I_on/I_off

With the feature size of MOSFET decreasing, the short channel effects has become increasingly serious. The subthreshold swing has reached the limit according to the theory of thermodynamics. Along with the threshold voltage is reduced, however, subthreshold leakage current has constantly increased. The dynamic power consumption of the MOSFET has restricted the development of integrated circuits and cannot be ignored.Low-power-dissipation device is designed to solve the aforementioned predicament and the tunneling field effect transistor(TFET) has been a research hotspot appearing recently years. It is based on the band tunneling current mechanism and shows super low sub-threshold swing. According to the calculation, the TFET sub-threshold swing can be much lower than 60mV/dec at room temperature, which is beyond the subthreshold-swing limit value of MOSFET. So the TFET shows a huge potential to be utilized in the low-power-dissipation applications.Although many research of TFET has been carried out, the existing Si-TFET transistor on-state current ratio is far away from the desired one. Besides, the leakage current magnitude of TFET using narrow-band-gap materials is so large, and many problems of the technical process remain to be solved, thus it fails to mass-produce the commercial TFET products. It is a valuable subject to investigate a new TFET with high switching current ratio and simple process.Generally, the existing way to improve the performance of TFET is utilizing the "pocket structure" or using narrow band gap materials. These methods could partly improve the device performance, but also bring some corresponding problems at the same time. In this paper, a new TFET is proposed; it takes full advantage of the material property and reform the device by utilizing the stress amplification structure. The introduced large stress in the epitaxial layer activates the piezoelectric polarization of special materials, thus it brings an improvement of the device performance.Firstly, the vertical TFETs utilizing piezoelectric polarization are simulated. When an epitaxial layer with piezoelectric polarization is grown on the source and intrinsic region, there is polarization charge being induced at the lower surface of epitaxial layer while the stress is applied. Owe to the induced polarization charge, there is a built-in electric field formed during the epitaxial layer, and the built-in electric field could increase the tunneling probability. As a result, the on-state current of the TFET increases by 2.5 orders of magnitude. In addition, the TFET with polarization charge shows hyposensitivity of source doping concentration. Even if the doping concentration in source region or lower tunneling junction is non-ideal-graded junction, the TFET with polarization charge can still maintain the excellent performance, thus the requirement of process is greatly reduced.Then, the influence of stress on the device performance is analyzed. Simulated results show that the stress should be controlled to make the polarization at a reasonable level. If the polarization is excessively strong, it will reduce the control ability of gate and difficult to turn off; and the leakage current and sub-threshold swing will be very large. Whereas, the increase of on-state current is so weak that the performance improvement is not obvious. So, the stress should be optimized to maximize the improvement on device performance.Finally, we proposed a novel structure to enhance the stress in channel region based on a dielectric block. It could not only introduce a great stress in epitaxial layer, but also modulate the electric field at the tunneling junction, thus the device on-state current is further increased by 54%.