A Study Of CMOS Analog Front-end Circuit And System For Biomedical Signal

With the continuous development of our country,people are getting richer in their material lives and paying more attention to their health problems.But the traditional medical exam-ination equipment is rather cumbersome and expensive,such as instruments for capturing ECG and EEG signals.Each time,patients have to spend a lot of time and money in hos-pital for medical examination.However,the development of wearable medical electronic equipment promotes the rapid growth of telemedicine and smart hospital and pushes on ad-vanced medical industrial's growth of our country.Also,the development of wireless body area network,low power integrated circuit and flexible sensor technique provides solutions for miniaturization and low power consumption of wearable medical electronic equipment.Also,analog-front-end（AFE）bio-potential signal acquisition circuit is the key part of wear-able medical electronic equipment,which decides the quality and accuracy of the acquired signal,together with the ability to withstand interference.The low frequency and small amplitude properties of bio-potential signal raise strict requirements for AFE's noise per-formance and die area.This thesis mainly focuses on CMOS analog front-end circuit and system for biomedical signal.This thesis firstly describes characteristics of biomedical signal,including magnitude and frequency features.Then discusses the circuit model of biological electrodes,analysis the interferences that will encountered during biomedical signal acquisition.Based upon that,circuit requirements and performance specifications of the AFE will be determined.After that,from circuit design perspective,this thesis will illustrate some key techniques and sys-tem architectures that contribute to interference suppression,noise optimization and power reduction.Among these,the system consists of a low noise amplifier and a continuous time delta-sigma modulator will be implemented.As for the low noise amplifier part,this thesis employs chopper modulation,trans-conductance boosting technique,ripple reduction loop and DC-servo loop to lower the 1/f noise,offset voltage in the AFE circuit.As for the contin-uous time delta-sigma modulator,this thesis firstly introduces the principle of non-idealities of the continuous time delta-sigma modulator.Then employs time domain analysis method based on close loop fitting to determined loop filter's coefficients,so as restore the noise shaping performance to the ideal cases.The proposed circuit and layout was implemented on SMIC 0.18μm CMOS process un-der a 1.2 V supply voltage.Post-layout simulation shows that the LNA achieves a 40.2 dB gain within a 0.5-5 KHz bandwidth and an input referred noise of 0.7μV_rms。For a 457 Hz input signal,the continuous time delta-sigma modulator exhibits an SNDR of 84.5 dB and an ENOB of 13.7 bit.