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Packet Processing Framework And Optimization Technique For CPU/FPGA Heterogeneous Platform

Posted on:2017-11-14Degree:MasterType:Thesis
Country:ChinaCandidate:J L YanFull Text:PDF
GTID:2428330569499048Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the continuous expansion of Internet and the application of emerging network technology,the increasing network traffic and emerging network protocols have posed a serious challenge to the processing performance and flexibility of network devices.Although it could provide high processing performance,the traditional ASIC chips lack flexibility.In addtion,the software programming based on multi-core CPU offers high flexibility,it has limited capacity and highly variable latency.In order to meet the performance and flexibility of network processing,the heterogeneous network processing platforms based on CPU/FPGA have been widly resesarched.However,the main problems existed in CPU/FPGA heterogeneous platform are the difficult co-processing and high I/O communication overhead,which affects the flexibility and scalability of packet processing.This paper launched the related research on these problems,the main work and innovations are as follows.1.We propose a heterogeneous parallel cooperative processing(HPCP)model.By dividing the traditional single processing plane into fast forwarding subplane and advanced processing subplane,HPCP model maps the network processing functions into software and hardware reasonably.In addition,we propose a hierarchical software development framework based on HPCP and develop three technologies(platformindependent API,virtual address space and the interfaces for dynamic deployment of processing functions)to improve the portability of program and scalability of network functions.2.We design a SKB-compatible Self-Described Buffer(SC-SDB).Packet buffer management,as the main overhead of packet I/O,is offload into hardware in SC-SDB mechanism.Moreover,SC-SDB improves the I/O performance by organizing the packets with linklist,polling processing model,setting affinity and etc.4.We design a SDB-enabled NIC based on FPGA and use PCIE bus to connect SDB-enabled NIC and Intel CPU forming a heterogeneous processing platform.Then,we compare the performane of SDB-enabled NIC and commodity NIC in different scenarios.The experimental results show that SDB-enabled NIC achieves 2x throughput in I/O forwarding and 34.75% improvement for typical network forwarding applications.To sum up,this paper researches deeply on the heterogeneous network processing platforms based on CPU/FPGA.The HPCP model and SC-SDB mechanism not only improve the performance of network processing,but also offer high flexibility and scalability for programming in heterogeneous platforms.Our work has theoretical significance and practical value to the development and application of network processing platforms.
Keywords/Search Tags:Heterogeneous, Parallel, Scalable, Packet I/O, buffer management, SC-SDB
PDF Full Text Request
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