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FPGA Based Design And Implementation Of Real-time PM-QPSK Demodulation Algorithm

Posted on:2018-12-09Degree:MasterType:Thesis
Country:ChinaCandidate:J YangFull Text:PDF
GTID:2428330569475122Subject:Optical Engineering
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Coherent optical communication has the advantages of high sensitivity and high spectrum efficiency.Simultaneously,signal distortions in generation,transmission and reception can be compensated in the digital signal processor(DSP)in electrical domain.For this reason coherent optical communication technique has become one of the most important technique for the next generation ultra-high-speed,ultra-long haul and ultra-high-capacity optical fiber communication systems.This thesis is mainly on the research of time recovery,polarization demultiplexing and equalization and carrier recovery of PM-QPSK signals.We set up a coherent optical communication system simulation platform based on VPI and Matlab to vertify and optimize the off-line demodulation algorithms.The real-time parallel demodulation algorithm is designd and implemented in FPGA.The main research contents and results are as follows:(1)The parallel structure time recovery module based on Gardner algorithm is designed.A two-level cache structure is proposed for the management of the signal sample queue and the adjustment of the coordinates of the samples.Off-line verification and analysis of simulation show when the degree of parallel is 64 and clock frequency offset is within 400 PPM time sychronization can be realized accurately.(2)The parallel structure polarization demultiplexing and equalization module based on constant modulus algorithm(CMA)is designed.The direct multiplication is replaced by signed multiplication in the calculation of coefficients of FIR filter which reduces the occupancy of hardware resources of the algorithm.A parallel CMA algorithm with the update of FIR filter coefficients in an independent way is proposed for reducing the computation clock cycles of the algorithm.The CMA algorithm is implemented by FPGA,and the symbol throughput rate can be up to 10 Gbaud.Finallay,the test analysis for real-time CMA algorithm is carried out.The result show that the algorithm can compensate the differential group delay(DGD)within 40 ps,and compensate the residual dispersion within 1200ps/nm.(3)The parallel structure carrier recovery module based on Mth power method and Viterbi-Viterbi phase noise compensation algorithm is designed.Pipe-lined carrier recovery algorithm is designed.By decreasing the logic delay of the unwrap module and optimizing the route delay,the FPGA operating frequency increased by 63.8% and the symbol throughput rate can be up to 10 Gbaud.Then on this basis,a feed-back carrier recovery algorithm is designed and implemented.By this method,the occupancy of resources of the frequency offset compensation module is reduced by 22%.Finallay,an adaptive demodulation method for BPSK/QPSK signals is proposed and implemented in a FPGA by sharing the hardware resources.(4)The real-time algorithm demodulation experiment based on the Xilinx VC7203 FPGA is carried out in our PM-QPSK coherent optical communication experiment system.The experimental result show the quality of the signal processed by the real-time algorithm is almost the same as that of by off-line algorithm processing.
Keywords/Search Tags:Coherent Receiver, Polarization-Multiplexed Quadrature Phase Shift Keying(PM-QPSK), Time Recovery, Polarization Demultiplexing and Equalization, Carrier Recovery, Field Programmable Gate Array(FPGA)
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