Design And Implementation Of QPSK Real-time Demodulation Algorithm In Coherent Optical Receivers

Recently, the huge demand of bandwidth in the internet has highly promoted the single channel transmission rate of the optical communication system. It is one of the mainstream schemes to adopt advanced modulation formats and coherent receiving technology to improve the transmission capacity of optical communication system. For now, Quadrature Phase Shift Keyin(QPSK) is a common modulation foamat, which makes it significant to work on the corresponding real-time coherent demodulation algorithm. This thesis mainly focuses on the research of the real-time implemention of the clock recovery algorithm, frequency offset compensation algorithm and phase noise compensation algorithm.(1) We research on the principle and mathematical model of clock recovery algorithm, frequency offset compensation algorithm and phase noise compensation algorithm, and develop the all-digital timing recovery algorithm, 4th power method and Viterbi-Viterbi phase noise compensation algorithm based on Matlab. Then we set up a coherent optical communication system simulation platform based on VPI and Matlab to vertify and optimize the function of the method. Simultaneously, in order to realize the clock recovery of optical signal with different data rates in homogeneous optical networks, we propose a symbol rate estimation method.(2) We adopt parallel processing scheme to design the real-time algorithm based on Xilinx V7 Field Programmable Gate Array(FPGA), which mainly implements the clock error detection algorithm, the 4th power method and Viterbi-Viterbi phase noise compensation algorithm. The effectiveness of the real-time algorithm is verified by the simulation analysis. On this basis, we utilize timing analysis to increase the operating frequency of the FPGA from 200 MHz to 333.33 MHz by optimizing the logic delay and path delay.(3) We set up the test platform for the real-time demodulation algorithm, and use the ChipScope and high-speed GTX transceiver to investigate the performance of real-time algorithm. The result shows that this design of clock error detection algorithm, 4th power method and Viterbi-Viterbi phase noise compensation algorithm can implement real-time demodulation for the 10 GBaud QPSK signal.