Research And Implementation Of Hardware/Software Partitioning Algorithms

The upgrading of Embedded Systems promotes the appearance and develop-ment of the Intelligent System,which is based on embedded technologies.Typical Intelligent Systems include intelligent transportation,smart home and smart medi-cal.On the basis of hardware,these systems realize intelligent control in software,and require close coupling between software and hardware.At this time,traditional design and development method has fallen behind and has been gradually eliminated,developers need Hardware/Software Co-Design to design systems.Hardware/Software Partitioning is one of the key problems in the process of Hardware/Software Co-Design.The partitioning results have an important impact on the system performance.Therefore,the Hardware/Software Partitioning is stud-ied in this paper.Firstly,a Modularization-Oriented Hardware/Software Partitioning Algorithm(HSPA_{M od})is proposed.This algorithm can divide tasks into different modules,and then divide tasks in modules into hardware and software.The algorithm can be used to obtain partition scheme according to the target requirements of the users,such as minimizing the execution time or minimizing the overall overhead.Secondly,this paper proposes a Hardware/Software Partitioning Algorithm Based on Task Scheduling(HSPA_{T S}).This algorithm combines the conventional Ge-netic Algorithm and the List Scheduling with Static Priorities.HSPA_{T S}can simul-taneously generate the strategy for Hardware/Software partition and the scheduling sequence for tasks,while meeting the given hardware area constraint.Experiments have been done to compare with some existing algorithms.The results show that our algorithm performs better in such a way that the running time of systems is decreased,and the utilization of hardware is enhanced.Thirdly,in order to automate the Hardware/Software Partitioning,this paper designs and implements a Hardware/Software Partitioning tool based on the two proposed algorithms.Finally,we use a BNN-Based Traffic Sign Recognition System as an example to illustrate the feasibility and effectiveness of the proposed partitioning algorithm in practical applications.In this case,we complete the system design and imple-mentation on ARM+FPGA heterogeneous platform by using Hardware/Software Co-Design method.