Study On Front-End Readout Microelectronic System Based On Digital Filter

This paper is supported by the Nation Natural Science Fund Project(No.11465136),which make a research on the front-end readout ASIC based on digital filter.In this paper,a 5 channels front-end readout ASIC has been designed and tested.It has important theoretical significance and engineering application value for the design of the readout ASIC.The main contribution of this work are follows:Firstly,according to the requirement of front-end readout circuit,the theory analysis and system design of the front-end readout ASIC are completed.The model of the front end circuit and digital filter are built by Matlab.Secondly,research on the front end readout ASIC,and circuit of preamplifier,filter shaper,SK filter,variable gain amplifier,analog to digital converter is been designed.Thirdly,the layout of the front end readout ASIC and ADC have be designed.The layout of the analog circuit is done by the Virtuoso tools,and the layout of the digital circuit is synthesized by the encounter tools.Fourthly,the test board of the front end ASIC is been developed,and the primarily test have been done.The main innovation of this paper includes:Firstly,a Charge Sensitive Amplifier based on deep N well is proposed,which can effectively suppress the substrate noise and improve the performance of the chip.?Secondly,the structure of single slope ADC based on digital phase locked loop is proposed,which solves the problem of the contradiction between the speed and accuracy of the single slope ADC,and improves the accuracy of the data converter.Thirdly,a variable gain amplifier based on binary weighted coding is proposed,which can obviously improve the gain variation range of amplifier and obtain more accurate gain control.A prototype chip was designed by using the TSMC 0.18?m CMOS technology.The chip size is 2000?m×2500?m.The noise performance of the chip is 114e~-+18.5e-/pF.The spectral resolution is 4%.The next step of this paper is to integrate the front-end readout circuit and digital filter algorithm on the same chip.