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ALICE/PHOS Front End Electronics Performance Study And Board Controller Design

Posted on:2009-05-09Degree:MasterType:Thesis
Country:ChinaCandidate:D WangFull Text:PDF
GTID:2178360245457746Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the constant improvement of particle energy in the high-energy physics experiment and the gradually increases of particle detector's scale, the experimental data amount is becoming larger and larger and the experimental data transmission speed is becoming higher and higher. Meanwhile, with the continuous development of the new technology, the high-resolution detection has important significance for high-energy physics experiment. The Front-end electronics (FEE) system which handles shaping, analog-digital conversion and signal processing of electronic signal plays a vital role in high resolution energy and time detection in patricle detector.One research work of this thesis is designing the FPGA firmware of ALICE/PHOS Front-end electronic card control system which called BC (Board Controller), based on analyzing FEE monitoring system which can decrease radiation environment's effect on electronic system. The FPGA design include ALTRO high-speed bus interface, RCUI2C bus interface, GTL driver control, system voltage, current and temperature monitoring module, high voltage control module and so on. This design make the FEE system getting more reliable and stable by adjusting the distribution of registers, modular design structure and also by using hamming code in bus control state machine to improve the ability for radiation protective.Another research work of this thesis is designing the FEE test system, writing the test program, and testing the parameters such as energy resolution, time resolution, peaking time, signal conversion gain ration, APD offset voltage precision and linearity for a batch of FEE cards. The testing results provide support for ALICE experiment analysis.The FPGA design will be used in the front end electronics system of ALICE/EMCAL detector in the future. And the testing reports on the parameters of FEE cards have been used to analyse the performance of ALICE detector.
Keywords/Search Tags:PHOS, FEE, FPGA, Shaper
PDF Full Text Request
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