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Research On Charge Trapping Memory Characteristics Based On WS2 And GOPDs Two-dimensional Materials

Posted on:2019-02-20Degree:MasterType:Thesis
Country:ChinaCandidate:H WangFull Text:PDF
GTID:2428330566465497Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
The rapid development of global electronic information technology,from a small range such as intelligent watches,mobile phones,laptops,digital cameras and GPS positioning systems,to a large range such as aviation,aerospace,navigation and other major areas,electronic products are already everywhere.At the same time,people have put forward higher requirements for electronic products that are small,portable,and fast.In order to meet the needs of users,the heart of electronic products?non-volatile memory with small size,high density,high speed,high data retention,low power consumption,and low cost?has become a direction for researchers.At present,there are mainly two hot researches in the memory:one is the improved charge trapping memory?CTM?based on the conventional floating gate memory,and the other is new structure memory to break the traditional structure of the non-volatile memory.The charge trapping memory inherits the traditional floating gate memory whose peripheral circuit,memory array and manufacturing process are basically the same as the floating gate memory,so it can be compatible with the traditional semiconductor CMOS process,and the CTM with the low operating voltage,low power consumption and high fatigue resistance,etc.has received widespread attention.The charge trapping memory has a good application prospect and is believed to be a major development trend in the future.The charge trapping memory consists of five parts:substrate,tunneling layer,trapping layer,barrier layer,and electrode layer.Its storage principle is to achieve discrete charge storage by trapping layers with unique material defects.Such a storage method effectively improves the anti-fatigue properties of the memory device and is particularly advantageous for the thinning of the tunneling layer thickness.However,it has been found by the investigation that CTMs currently still have problems such as high operating voltage,low charge trapping density,short-term data retention,high power consumption,high cost,and poor stability.This topic is mainly based on the above problems in the memory device,trying to apply new structures and materials.The main tasks of this project are as follows:Tungsten disulfide?WS2?nanosheets and graphene oxide quantum dots?GOQDs?are two-dimensional materials with small vertical and horizontal dimensions,edge functionalization,and adjustable band gaps.The advantages of non-toxicity,stability,and low cost make the microelectronics industry a viable opportunity.In this subject,on the one hand,two kinds of two-dimensional materials,WS2 and GOQDs,are subjected to X-ray diffraction?XRD?spectroscopy,X-ray photoelectron spectroscopy?XPS?,scanning electron microscopy?SEM?and Raman Spectra were used to characterize the materials.On the other hand,the two materials are respectively introduced into charge trapping memory cell devices of different structures to perform capacitance-voltage?C-V?,data-retention,leakage current,and other electrical performance tests and memory principle is analyzed.The results of the research in this project indicate:On the one hand,a Pd/ZHO/WS2/ZHO/WS2/SiO2/Si structure,which the thin tungsten sulfide nanosheets were used as the charge-trapped stack layer,was prepared.At a±5V gate sweeping voltage,the device shows a 2.26V memory window and a trapped charge density gets to 4.88×1012/cm2.Also,after the measurement time of1.20×104 s,the high/low capacitances increased by 3.81%and 3.11%,respectively.The unique edge structure,atomic defect and band gap of WS2 wafers are favorable for CTM storage performance.In addition,the proposed memory fabrication is not only compatible with the CMOS manufacturing process,but also frees from the high temperature annealing process.Overall,this proposed charge trapping memory is highly attractive for low voltage,low cost,long data storage applications.On the other hand,the Pd/SiO2/ZHO/GOQDs/SiO2/Si memory incorporating GOQDs was compared with the same device without GOQDs.In comparison,the GOQDs memory window size increases by an average of 35.7%and has a memory window size of 1.67V can be achieved with only a gate scan voltage of±5V.After1.08×104 s,the high/low capacitance had a decay of 1.2%and 3.8%,respectively.The above excellent performance shows that GOQDs can improve the storage performance.The main reason is that graphene oxide quantum dots have many oxygen-containing functional groups and a wide adjustable band gap,and deuterium oxygen has a large number of charge-occupying oxygen vacancy defects,so the device can achieve low leakage current,long-term data retention and low operating voltage.The structure of the GOQDs memory is relatively simple,the process is compatible with the CMOS,and the introduction of complicated process factors is avoided.The introduction of two-dimensional materials greatly improves the performance of charge trapping memory.The storage of the above two different structures and different materials is expected to have a certain reference value in subsequent studies.It is believed that with excellent performance,it will occupy certain advantages in the future electronic storage market.
Keywords/Search Tags:Charge trapping memory, 2D Materials, WS2, GOQDs
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