Research And Hardware Acceleration Engine Design For Low Perfusion Algorithm Of Wearable Oximeter Chip

Oxygen saturation(SpO2)can reflect the level of oxygen in human blood which has important implications for the health care and diagnosis of disease.Traditional oxygen detection equipments are difficult to be effectively promoted because of the big size and expensive price.With the development of the Internet of Things,sensor technology,Integrated Circuit and intelligent operating system,the wearable devices are widely used.So researches based on effective and reliable wearable oxygen detection products are becoming popular.Current wearable products such as galaxy S6 smart phone,can only detect SpO2 of healthy people.But for people with low blood perfusion,such as respiratory disease patients,critically ill patients and newborn babies,the test results are not accurate.But in most cases,the weak groups need more SpO2 detection,rather than healthy people.Based on low perfusion SpO2 detection,this article firstly studied the measurement principle of oxygen saturation and the characteristics of low perfusion oxygen signal.Then,the algorithm“fundamental frequency detection and narrow bandpass filterring”was designed to calculate SpO2 in wearable oximeter when it was in low perfusion condition.In order to verify the correctness of the algorithm,the software simulation was done,and the results showed that the algorithm had a good effect on low perfusion oxygen signal.Power consumption of wearable devices is generally the lower the better,so the system clock frequency should not be too high.Considering the great amount calculation of the algorithm,it was implemented by hardware logic circuit and a two-stage pipeline structure was designed to accelerate computing.After completing the hardware design,hardware modules were tested using Modelsim and the Xilinx KC705 FPGA board.The FPGA tesing results show that the hardware circuit can calculate SpO2 value from as low as 0.1%perfusion oxygen signal.Compared with relevant literatures,the measurement accuracy has greatly improved.At last,the ASIC implement of the design was done in SMIC 0.18?m technology and successfully taped out.The results show that the area of the algorithm circuit is 1004003.33?m~2 which is 114.35k equivalent logic gates,the highest work frequency of the circuit is 120.83MHz,and the dynamic power is 6.18mW.