Research And Implementation Of High-Precision Time Synchronization Technology Based On FPGA

With the rapid development of communication and computer technologies,the accelerate of industrial informationization process,a great many of distributed system,industrial control system,and the applications of Internet of things(IoT)demand higher for time synchronization,mainly manifested that it demand higher precision and faster synchronous speed,lower synchronization costs,stronger robustness.The current standard protocols for precise time synchronization(PTP)are mainly IEEE1588 and 802.1as.But these systems that implement these protocols require special hardware support,higher cost costs and protocols are too complex,in the single-hop network scenarios,obviously it cannot achieve better comprehensive performance in time synchronization precision,overhead,and hardware cost.Therefore,we study,design and implement a time synchronization system based on FPGA which has a better comprehensive performance with less resource occupancy and lower hardware cost.This article introduce the current of time synchronization protocols and application scenario firstly,then we demonstrate the main surffering and optimization direction in time synchronization system,we also analyzed the factors which will influencs that,and propose goals of our system.To improve the time synchronization accuracy,reduce synchronization overhead and reduce the costs of hardware,this article mainly does four aspects of work.First,we make a full use of broadcast channel in the local area network(LAN)to get more measurement information between each slave clocks,which not only simplifies the synchronization procedure than traditional protocol,but also obtains many times of measurement information to reduce the loss of precision caused by the jitter.Secondly,In order to further reduce the link jitter and congestion caused by the network load,we design a scheme for resources reserving and scheduling in LAN.Thirdly,we combined time phase synchronization and frequency synchronization into one procedure,and proposed an optimization scheme in FPGA for frequency offset calculation based on recursive least square(RLS).Fourthly,we designed and implemented 10 G Ethernet transceiver system and real-time timestamp marking circuit,to ensure the real-time performance of the timestamp.Finally,we introduce the implementation scheme of the whole system based on FPGA.We also simulation our time synchronization system and actually test it in FPGA platform.Then the simulation verify the expected comprehensive performance and our system works well in FPGA platform.