B3G Time And Frequency Synchronization Algorithm And Realization Technology Of

Orthogonal Frequency Division Multiplexing (OFDM) is a promising modulation technique for B3G systems for its high spectrum efficiency and robustness against multipath selective fading. The basic principle of OFDM is to divide a wideband frequency channel into several overlapping subchannels. Despite spectral overlap, the data in subchannels can be perfectly separated at the receiver as long as the subchannels are orthogonal. In these systems, the receiver must keep synchronization with the transmitter in both time and frequency domains to maintain the orthogonality. However, OFDM is sensitive to the synchronization errors, so synchronization is significant to B3G systems.In the"FuTURE Project", UESTC is in charge of design and implementation of the B3G TDD downlink system. This system is based on OFDM and MIMO, and implemented by FPGA, its data transfer rate is 100Mbps.This paper is focused on the design and implementation of synchronization algorithms.It contains the design of frame synchronization algorithm and OFDM frequency synchronization algorithm and the FPGA implementation of synchronization module and multi-carrier demodulation module.In the topic of the frame synchronization algorithm design, this paper adopts the method of automatic frequency tracing to solve the problem of decreasing of correlation summit leaded by frequency offset. To solve the missing detection problem of frame synchronization, a novel Phase Locked Loop has been designed to trace the output pulse sequence of detection circuit. It provides a complementary pulse when missing detection occurs.In the topic of the frequency synchronization algorithm design, looking forward to the contradiction between estimation range and estimation precision, we present a method which uses the PN sequence and the second-order feedback loop jointly. The advantage of the method is that it has wide estimation range and high estimation precision. The results show that the proposed method can significantly improve the performance of the system.According to the frame synchronization and the frequency synchronization algorithm, this paper introduces a joint synchronization architecture and implements it in FPGA platform. All these have been proved available in the Beyond 3G experimental system.