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Research And Implementation Of High Speed Storage Based On FPGA

Posted on:2019-11-13Degree:MasterType:Thesis
Country:ChinaCandidate:Q S XuFull Text:PDF
GTID:2428330548979635Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
The development of science and technology can not be separated from the calculation and analysis of large number of data,which requires sufficient storage space to store data within the permitted time.The demand of power and reliability in the storage system becomes harsh Therefore,scientific research institutions and related enterprises need to improve the configuration of their equipment constantly,and supply a storage system that meets the requirements with superior performance.Since the data volume in radar communication,data monitoring,equipment testing and other fields is large and the transmission speed is fast.The focus of this paper is how to save a large number of data to the storage equipment with high-speed,and improve the low storage capacity and the limited transmission bandwidth of traditional storage equipment.In this paper,start with introduce the background of this system.Secondly,according to the target task design the scheme of the logical part in the system and design the function module with logical code.NAND Flash Memory is used as the basic storage medium,and use parallel operation and pipeline operation to improve the bandwidth of the system board.In this design FPGA work together with PowerPC,they communicate through Local Bus and SRIO.The logic design of control module include,bad block statistics,data writing,data export,reading and writing of NAND Flash chip array.In the logic scheme of the storage board,use the BCH codec module to realize the function of data error checking and error correction,and adopt the bad block management scheme to improve the stability of data.In the design,use the NV-DDR2 mode to read and write the NAND Flash.The data packet should be coded in the record mode before write to the NAND.If want output data to the high-speed interface module,should decode the data from export mode and then transmitted to the packet module.The functions such as data acquisition,export,erasure and setting of the storage board can be verified and tested through the host computer software of the storage board system.And the serial port,temperature monitoring,voltage detection and environmental testing can be debuged through building hardware platform.The Xilinx's XC7VX485T-2FFG1761 I chip is used of as a controller in the design.The common IO port and the number of SERDES in it is relatively suitable for the system.The XC7VX485 T can be upgraded to XC7VX690 T without changing the hardware.The number of IO can be use in XC7VX485 T is 700,and the number of SERDES is 28.The storage space of this storage board can expand the from 5TB to 10 TB.It was tested that the memory write bandwidth is not less than 3GB/s,and the read bandwidth is not lower than 3GB/s(according to the extension scheme,it can be expend to 6GB/s).During the process of storage,or the data is written,the stored data can be uploaded to the upper computer through the high-speed interface module or the Gigabit Ethernet channel which integrated in the FPGA.Finally,the storage board with high storage capacity and strong computing ability is finished,which is especially suitable for use with ground radar equipment.
Keywords/Search Tags:NAND Flash, Memory, High Speed, FPGA
PDF Full Text Request
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