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Full-wafer IGBT Chip Design And Manufacture

Posted on:2019-07-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y L LiuFull Text:PDF
GTID:2428330545957400Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
At present,megawatt-to-megawatt high-capacity power electronic devices are limited by traditional thyristor converter technology,and generally have the following problems,including relatively low switching frequency,high harmonics,large volume,and poor dynamic response,easy to produce commutation errors and other shortcomings.Although the development of medium and small-capacity power electronics technology is relatively mature,modern power electronics technology will eventually enter into large-capacity power conversion applications.This dissertation conducts research on the whole-wafer IGBT semiconductor device,and proposes a 3300V full-wafer IGBT chip design method based on a whole-wafer IGBT redundancy design concept for isolating a defective device unit,and proposes this structural design method.Combining the process with the tape,this article begins with the development of a 3300V full-wafer IGBT chip.The main work of this paper is as follows:1.From the point of view of the overview of semiconductor power devices and the development history of IGBTs,the necessity and significance of the research on full-wafer large-capacity IGBTs are explained.2.Analyze and discuss the structure and basic working principle of the IGBT device,and then propose a cell optimization design and terminal optimization design of the 3300V full-wafer IGBT device based on the electrical characteristics of the IGBT device,and determine the dimensional parameters of the cell,and then According to the result of the appearance of the flowsheet before optimization,two sets of solutions are proposed,namely,two different layout optimization designs.3.Conduct comparative test analysis and analysis of the above two sets of layout taper results,and test the static parameters of the second set of 3300V full-wafer IGBT chips.It was found that the effect of the two layout optimization schemes was satisfactory,and basically reached the expected results.However,the second layout scheme(sixteen identical and independent areas)had only partial areas with electrical characteristics,which also indicated that the current full-wafer IGBT process Need to improve,improve its yield.
Keywords/Search Tags:full wafer, IGBT, planar gate, termination structure, layout design
PDF Full Text Request
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