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The Research On RO PUF Based On FPGA

Posted on:2016-05-05Degree:MasterType:Thesis
Country:ChinaCandidate:B TangFull Text:PDF
GTID:2428330473964828Subject:Software engineering
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Field-programmable gate array(FPGA)is a widely used programmable digital integrated circuit.A variety of applications can designed based on the FPGA platform.Intellectual property(IP)core is a binary file which can be downloaded to FPGA for running.With the widespread use of IP core,more and more infringement of IP cores,such as cloning,overbuilding,replay attacks,reverse engineering,side-channel attacks and hardware Trojan has occurred.Therefore,how to protect the IP core effectively has got more and more attention.Physical unclonable function(PUF)is an IP core protection technology.The uniqueness and non-cloning property of physical unclonable function can be used to protect IP core.In this paper,we focus on the reliability and reconfigurable of the ring oscillator(RO)PUF.The main works are as follows:(1)For the unreliability of RO PUF under different environmental factors,we put forward a frequency offset algorithm(FOA),which can effectively improve the reliability of RO PUF under the temperature and voltage environment.The proposed FOA method in this paper is on the basis of the basic RO PUF architecture.By adding adder unit behind counter,which can make the frequency difference between two ROs greater than a certain threshold,the environmental influence of RO PUF is overcome and the reliability is ensured.Experimental result shows that the FOA method has better reliability than temperature-aware cooperative(TAC)method under the effect of temperature.Under the consequences of different voltage,the FOA method has better reliability than TAC method when the reliability threshold factor is large.In the aspect of hardware efficiency,ours FOA method has obvious advantage than TAC method.It's noted that our FOA method can achieve the 100%utilization of ROs,which leads to longer response sequence and can increase the data set of challenge-response pairs(CRPs).(2)Since FPGA systems are vulnerable to replay attacks,the reconfigurable binding technology can be used to overcome those attacks.In this paper,we propose a kind of reconfigurable RO PUF architecture by crossing different ROs,which is a reconfiguration instance of RO PUF at inverter level.We implement the reconfigurable RO PUF by adding multiplexers between AND gate and NOT gate as well as NOT gate and NOT gate.Compared to the RO based reconfigurable PUF,the experimental result shows that the proposed reconfigurable RO PUF architecture by crossing different ROs can gain a lot of reconfigurable number and a higher hardware efficiency.Under the same number of ROs and the same RO order,the proposed reconfigurable RO PUF architecture has obvious advantages than RO-based reconfigurable PUF in reconfiguration number and hardware efficiency.For example,set the number of RO to eight and RO order to nine,the reconfiguration number of our proposed architecture is 1.10E+11 times and the hardware efficiency is 1.32E+11 times than RO-based reconfigurable PUF.
Keywords/Search Tags:Intellectual property protection, Physical unclonable function, Frequency offset, Replay attacks, Reconfigurable by crossing ROs
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