Error Detection And Correction Based Low Power Digital Circuit Design

Following Moore's Law,the integrated circuit technology has entered the submicron and even deep sub-micron era.With the scaling of circuit geometry size,the integration of system continues to increase.The power consumption in large-scale circuit,especially the wide application of wearable devices and mobile communication devices,becomes more and more significant.It has become a bottleneck restricting the development of integrated circuits.How to realize the function of the circuit under the limited power consumption has become the major challenge in integrated circuit design.Making trade-off between circuit performance and power consumption is necessary,which makes it possible to achieve higher performance when reducing power consumption.Since the power consumption of the circuit is approximately proportional to the square of the supply voltage,among the low power technology,dynamic voltage scaling(DVS)technology is still the most effective method to achieve power saving.Error detection and correction based technology is a typical representative of dynamic voltage scaling.In the circuit,the delay of the path roughly follows the normal distribution,the proportion of short path and critical path is small.When the supply voltage decreases,cell delay becomes larger.The delay of some critical paths will exceed one clock cycle,which may result in circuit failure.Error detectors can be placed on these critical paths and timing errors can be detected by these timing error detectors.When detecting timing errors,some error correction mechanism will be employed to correct the low occurrence probability errors.Through this way,power consumption reduction and saving energy can be achievedThis paper reviews various timing error detection and timing error correction techniques,then proposes a timing error detector and one cycle error correction technique with time borrowing property.The timing error detector has simple structure and consumes small area overhead.Combining the timing error detector with global clock gating and the one cycle error correction technique with time borrowing property separately can form two complete timing error detection and correction mechanisms.To verify the proposed techniques,the two mechanisms are implemented in different circuits.The simulation results show that applying the two timing error detection and correction mechanisms to different circuits can reduce power consumption and achieve energy-saving.Comparing to the traditional worst-case design,the first low-power mechanism can achieve up to 32.2% energy saving,the second mechanism can achieve 18.18% energy saving.