Research Of A Control Flow Error Detection And Correction Technique Based On Hybrid Of Software And Hardware

With the development of the manufacturing technique of semiconductor, feature size of integrated circuit decreases continuously. This makes integration level and performance of chips improve significantly. But because of this, chips become more sensitive to environment like EMI, particle radiation, etc. The dependability issues of computer system become more serious because of the hardware transient fault, especially for the embedded systems which work in industrial and special environment. Hardware transient faults will influence the correct behavior of program, and the runtime errors caused by the faults are usually been called soft-errors. Most of the soft-errors are control flow errors, these errors will let procedure run differently from the original logic, and make the system collapse or output wrong results. The problem of control flow error detection and correction has become an important research direction in embedded security area.Currently there are a lot of fault-tolerant techniques based on hardware or software, but techniques based on hardware usually lead to high design complexity and high manufacturing cost; techniques based on software often lead to expansion of code size, sharp decrease of system performance and low error coverage. So the thesis proposes a control flow error detection and correction technique based on hybrid of software and hardware:in the aspect of software, compile toolchain will be changed and calculate signature for source program at compile time; and in the aspect of hardware, CPU will be extended to support signature verify and error correction without the changes of other hardware modules. In addition to the introduction of the fault-tolerant technique, the thesis introduces the design and implement of the toolchain in detail.Finally, experiment would be done on CSKY-CPU platform, experimental data like hardware simulation data, code size, performance, error detection ratio and error correction ratio would be evaluated and analysed. The experimental result indicates that the scheme this thesis proposes has the advantages of low cost and high error coverage.