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Circuit Model Establishment And Simulation Of STT Logic Devices

Posted on:2019-06-02Degree:MasterType:Thesis
Country:ChinaCandidate:A Q CaoFull Text:PDF
GTID:2348330569495445Subject:Engineering
Abstract/Summary:PDF Full Text Request
Experts and scholars at home and abroad generally believe that the development of the microelectronics industry has triggered a wave of the third industrial revolution,and the research and industrialization of magnetics-related electronic devices are likely to become the fourth industrial revolution after microelectronics technology source.With the rapid development of computers,communications,and information and other electronic fields,memory,as its core component,has increasingly higher performance requirements.Since spin transfer torque magnetic random access memory integrates advantages such as high storage density,fast read/write capability,and low power consumption,it is especially compatible with CMOS technology.In recent years,spin transfer torque magnetic random access memory has attracted the attention and research of more and more semiconductor companies and related research institutes at home and abroad.However,the reading circuit of the existing spin transfer torque magnetic random access memory still has a certain probability of read error,so the circuit reliability and accuracy have yet to be studied and optimized.In addition,in non-volatile memory cells,Spin-Torque-Transfer Magnetic Tunnel Junction(STJ)due to infinite number of writes,non-volatile,compatible CMOS process,such advantages have received extensive attention and research.This paper focuses on the physical model of the magnetic tunnel junction,the related parameters of the magnetic tunnel junction,and the novel memory readout circuit using the magnetic tunnel junction for research and analysis.The main tasks include:1.The establishment and simulation of a physical model of a magnetic tunnel junction based on spin-torque effects.The modeling aspects mainly include the resistance of the magnetic tunnel junction,the critical current and the flipping time,and the corresponding implementation using Verilog-A language.In terms of verification,the verification of the inversion and current resistance curves in the parallel state and anti-parallel state was mainly verified,and the reasonableness and accuracy of the model establishment were preliminarily verified,which laid the foundation for the subsequent circuit design.2.Simulate some parameters of the magnetic tunnel junction and analyze the influence of these parameters on the magnetic tunnel junction.It mainly includes the relationship between the resistance and area product of the magnetic tunnel junction andthe thickness of the oxide layer,the influence of the diameter of the magnetic tunnel junction on its critical current and overturning conditions,and strives to find suitable magnetic tunnel junction parameters to reduce the false flipping probability of magnetic tunnel junctions during circuit operation,and reduce the interference of the input current on the magnetic tunnel junction and improve the reliability of the circuit.3.Analysis the spin transfer torque magnetic random access memory circuit,including the cause of read and write errors and read current magnitude and direction of the read circuit of the spin transfer torque magnetic random access memory.In addition,an important part of the read circuit,the current sensitive amplifier,is introduced.Based on this,a new read circuit design is proposed for the reduction of the overall read error rate of the circuit,ie,a read circuit using a triple-mode redundant structure.To achieve the purpose of improving the accuracy and reliability of reading data.It lays the foundation for optimizing the design of the memory.
Keywords/Search Tags:Spin-Torque-Transfer Magnetic Tunnel Junction, compact model, high reliability, triple-mode redundant structure, read circuit
PDF Full Text Request
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