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Research And Design Of The Loop Of Boost Converters Based On Constant Off-Time Control

Posted on:2019-06-01Degree:MasterType:Thesis
Country:ChinaCandidate:X L WeiFull Text:PDF
GTID:2348330569495413Subject:Engineering
Abstract/Summary:PDF Full Text Request
The Constant On-Time and Constant Off-Time(COT/CFT)control mode derived from hysteresis control is favored for its fast transient response,and the peak current mode is also popular for its high accuracy and cycle-by-cycle current limiting characteristics.However,for Boost converters,there is a 180° phase difference between the output voltage ripple and the inductor current ripple,which limits the application of the Boost converter in the COT/CFT control mode.The peak current mode Boost converter requires a slope compensation circuit to eliminate the sub-harmonic oscillation problem,which increases the design difficulty.The CFT control-based Boost converter combines the peak current mode with the CFT control mode to obtain a relatively fast transient response.At the same time,there is no sub-harmonic oscillation and the circuit design is greatly simplified.The Ridley model most used in the industry explains the accuracy of the peak current model.However,the sample-and-hold theory used in the modeling process does not exist in the Boost converter based on the CFT control mode.So the accuracy of is challenged.A new modeling method which analysis from closed-loop time-domain and combined with mathematical derivation came into being,and its accuracy has been recognized more and more.The right half plane zero in the loop of the Boost converter seriously affects the stability of the system and increases the difficulty of designing the compensation.The on-chip compensation method is becoming more and more popular among enterprises because it can reduce chip pins and peripheral devices.Therefore,this paper proposes an on-chip compensation strategy to implement the compensation design of a Boost converter based on CFT control.Another advantage of the Boost converter based on the CFT control is that the sampling is simple,and the voltage drop of the main power transistor on-resistance can reflect the rise of the inductor current.However,the value of the on-resistance voltage drop is too small to make it difficult to compare the sampling voltage with the output voltage of the Error Amplifier.In this paper,the dynamic range matching module is designed and by using the "two-dimensional compression" method,the correct comparison of the system within a wide load range is realized.At the same time,synchronous switch are used instead of diodes to improve the efficiency of the circuit.However,when the synchronous switch does not have the unidirectional conductivity of the diode,when the load is reduced,current will backflow from the output to the input occurs after the inductor current passes through zero.For this reason,a zero-comparator circuit is designed to ensure that when the inductor current crosses zero,the circuit enters DCM mode,which improves the efficiency to some extent.The Boost converter loop designed in this paper adopts 0.18?m BCD process,and through Spectre software,the submodule,system startup and shutdown,transient transition,DCM operation mode and working ripple are simulated and verified and Simulation results show that the design loop meets the design goals.
Keywords/Search Tags:Boost convertor, Right half plane zero, On-chip compensation, Dynamic range match, Zero-comparator
PDF Full Text Request
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