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Single-Event-Effect Analysis And Circuit-Level Simulation

Posted on:2019-05-23Degree:MasterType:Thesis
Country:ChinaCandidate:Q Q WenFull Text:PDF
GTID:2348330563954348Subject:Microelectronics and Solid State Electronics
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With the advancement of the manufacturing process of IC,the shrinkage of feature sizes of devices,the reduction of system operating voltage,and the increase of operating frequencies,the effects of radiation in the cosmic environment on the astronautics chips have become increasingly prominent and seriously affecting the development of aerospace in various countries.High-energy ions bombard the sensitive area of the integrated circuit and generate single-event transient pulses,which can cause storage data errors,affect subsequent calculations,and even cause the entire system to crash.The traditional single event effect studies mainly concern on the drain of the sensitive region of the device.In recent years,some international studies have shown that the transient current pulse and charge collection of the device are related to the strike position of the ion.In this dissertation,based on the study of the mechanism of the single event effect and the injection pulse model of the existing SET current source,we focus on the influence of the single event effect on the traditional silicon process device when the ion is strike on the well region.The main work of this article is as follows.1.Based on the 90nm double-well process,three-dimensional modeling of NMOS and PMOS devices was performed and the process was calibrated with the SMIC 90nm library.The calibration results showed that the three-dimensional model of the device established in this dissertation fits well with the actual results.The development of device-level single event effects provides accurate model support for the study in the following chapter.2.The device-level single event effects are studied.It is found that the shape and voltage characteristics of the SET current of the NMOS,PMOS and CMOS inverters are affected by the strike position of the ions and the LET value.An increase in the distance between the strike position and the drain boundary will reduce the charge collected by the device and the current peak value;an increase in the LET value will increase the charge collected by the device and the current recombination time.Provide experimental data and support for the establishment of one-dimensional SET pulse current injection model developed in the subsequent chapters.3.Introduce the strike position of the ion into the study of the SET current source model,analyze and establish a one-dimensional independent SET current pulse injection model based on the strike distance of the PN junction.The influence of parasitic bipolar amplification effect on NMOS and PMOS is further studied when the strike position of ions is in the well region,and then the single transistor one-dimensional SET current source is modeled.Finally,the current source model is verified by SPICE.The results show that the one-dimensional independent SET current source model based on the strike distance can well reflect the single event effect on the device current pulse when the strike distance changes.4.The simulation introduces the difference between the independent current source and the coupled current source.The one-dimensional coupled SET current pulse injection model is modeled based on the ion strike distance.The SPICE simulation verifies that the one-dimensional coupled current source established in this dissertation can better reflect the current pulse characteristics of the inverter SET when the strike distance changes,and can also better reflect the "step effect" of the coupled current source.For SET pulse width prediction,the maximum error is 11.73%and the average error is 10.76%.
Keywords/Search Tags:SET, strike position, device-level simulation, circuit-level research
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