Lightweight AES Design For Applications Of Internet Of Things

The Advanced Encryption Standard（AES）algorithm is a symmetric packet encryption algorithm.The secure SOC chips are becoming more and more widely applied under the background where the Internet of things（IOT）is developing in depth.The implementation of low-cost and low-power lightweight cryptography has become the mainstream requirement in the face of achieving balance between resources and performance of secure SOC chips.Traditional pure hardware implementation usually causes large cost of hardware resources.To solve this problem,the AES algorithm is improved and a lightweight AES algorithm implementation is proposed based on cooperation of hardware and software,which shares its hardware resources to the secure storage system in SOC chip in this thesis.At the same time,the key-expansion algorithm is optimized to improve the security.The main content of this thesis includes:1.studying the principle of AES algorithm,investigating the research status among cryptographists at home and abroad,and discussing all kinds of applications of AES IP in the Internet of things.2.studying the basic principle of the secure storage system in the SOC chip,and confirming the practicability of reusing hardware resources of the AES module for the data encryption and decryption module in secure storage system.3.analyzing the characteristics of each step of the AES algorithm to determine the basic architecture of implementation;dividing the function of hardware and software to implement the AES algorithm by cooperation of hardware and software;exploiting a synchronous FIFO as the interface between the software and hardware;optimizing the key-expansion algorithm to improve its security and reconstructing the operation state machine to enable the secure storage system of the SOC chip to reuse the hardware resources.4.integrating the AES IP implemented by hardware into the secure SOC chip based on AMBA AHB bus;building a verification platform to support the front-end simulation by designing software assembler instructions;and finally implementing the resource-sharing AES algorithm by cooperation of software and hardware and conducting functional simulation verification and performance analysis.The AES₁28 IP implemented in this thesis supports two kinds of working mode,namely Electronic Code Book（ECB）mode and Cipher Block Chaining（CBC）mode.This design consumes about 2418 equivalent gates for hardware,and saves circuit resources by 20%for the memory reading and writing module of the secure storage system,which has comprehensive functions of encryption and decryption,occupies less hardware resources,achieve high safety,and is suitable for lightweight security application.