Research And Implementation Of Stacked Multiple CPU-FPGA Micro-server Architecture

With the development of high-performance computing and cloud computing,the performance of computer systems continues to increase,more and more power consumption is becoming the bottleneck of system capacity.At present,the performance of embedded microprocessors(such as ARM)has been greatly improved,with low power consumption characteristics.At the same time,the development of integrated circuits and programmable technology make the application of FPGA more and more widely.The use of hardware parallel computing with FPGA,can achieve a specific algorithm to accelerate.The combination of FPGA and embedded CPU,can make up for the relative lack of CPU computing power.Therefore,the use of multiple low-power CPU-FPGA module to build Micro-server,is a new way to build a high-performance computing platform with high-density and energy-efficient.This thesis studys and implements a physically stacked Micro-server prototype system architecture consisting of multiple CPU-FPGA modules.The Micro-server architecture in this thesis includes three aspects:Micro-server overall architecture,Micro-server interconnection and Micro-server storage structure.In terms of overall architecture,Based on the requirements analysis,this thesis studies and designs the overall architecture of the stacked multiple CPU-FPGA Micro-server archritecture,that is,the Micro-server includes a number of modules interconnected by the internal bus.The module is divided into Master and Slave;each module has a CPU-FPGA heterogeneous computing structure;a number of modules form a distributed shared storage system;the system external communication interface is by the Ethernet interface of the Master.In the aspect of interconnection,this thesis expatiates the interconnection structure inside and outside the Micro-server from three aspects:in-board interconnection,inter-board interconnection and system external interconnection.The in-board interconnection adopts the AXI_GP and AXI_HP interfaces.The inter-board interconection selects the simple and efficient bus connection,and designs the special bus SEU-mBUS of the system from the aspects of signal line and bus operation process.The system's external connection is by the single data path in Master.In the aspect of storage structure,this thesis first determines that the system is to realize the distributed shared storage structure.Then,based on the analysis of the storage consistency model,the lock-based domain consistency model of the system is determined from the point of reducing the consistency maintenance traffic,and finally at the operating system level,from two aspects of the memory organization and Cache consistency agreement,the SVM structure of the Micro-server is designed.Finally,this thesis realizes the prototype of the Micro-server architecture system,and implements the application example of the satellite cloud image retrieval system on the prototype,Based on the application,the calculation speed performance of the prototype system is tested.Finally,it shows the Micro-server has a greater performance improvement compared with the Tower server.