Research On High Performance Parallel Computing Architecture Based On FPGA+DSP

High-performance computing as the country's most important device has always been the focus of research in all countries.From a strategic point of view,high-performance computing has become an important symbol for evaluating the overall strength and technological level of a country.High-performance computing plays a crucial role in national defense construction,technological development,and economic construction.High-performance computing is also indispensable in key critical areas such as aircraft design,biomedical research,global climate monitoring,and nuclear weapons research.In recent years,with the development of high performance parallel computing,various parallel and parallel algorithms have come out in an endless stream.High performance parallel computing has played a great role in the development of the field of Aeronautics and Astronautics.In the process of carrier and aircraft flying,the computer needs a variety of complex information processing,such as position calculation,image processing and so on,to make information fusion judgment.Faced with the real-time interaction of high speed information,high speed processing capacity for large amount of data and large amount of computing,it also needs to have the ability to adapt to the change of the application,and the problem of miniaturization and low power consumption.Traditional processors and computing architectures are hard to meet the current needs.In the embedded domain,the high performance embedded parallel computing architecture based on embedded processor is studied for reference by the research results of the high performance computing of the supercomputer.Learning from the research results of high-performance computing of current supercomputers,in the embedded field,the high-performance embedded parallel computing architecture based on embedded processors is studied,which can well solve the current problems on vehicles and aircrafts due to their size and power consumption.The paper mainly analyzes the requirements of the current integrated navigation,trajectory planning,image guidance and other aspects.It is found that in these application backgrounds,the demand for the real-time and rapidity of the embedded system information processing capability is increasing.At the same time,in different application backgrounds,the embedded systems have different architectures and lack commonality.The general embedded processing architecture and high performance embedded processing system are very important for improving the comprehensive information processing capability of embedded systems.This paper first analyzes some common parallel computing models and programming models in the field of parallel computing,and has a detailed understanding of parallel computing.Then through the analysis of the specific requirements in the application background,matrix multiplication,integral transform,FFT transform and image processing are extracted to occupy a large amount of time in the current algorithm operation process.By accelerating the above algorithms in parallel,the overall algorithm can be accelerated.Then the hardware design of the general architecture is carried out,and the FPGA+ multi-core DSP is adopted to combine the advantages of the two processors.Finally,parallel programming and optimization design of the OpenMP parallel programming model for the shared storage of the algorithm based on the hardware architecture are performed and tested.Through tests,the results show that the acceleration effect is good.According to the use of the algorithm structure,the final acceleration results are also different,and the maximum acceleration ratio can reach 7 or more on an 8-core processor.