Design And Implementation Of GCC Instruction Scheduling Algorithm Based On TMS320C6000

TMS320C6000 invented by TI Company is a digital signal processor towards the real-time signal processing.With the using of VLIW architecture,this kind of C6000 DSP can emit eight instructions per cycle and is very good at supporting instruction paralleling.So C6000 is widely used in military or our daily life.To exert the efficiency of this DSP,C6000 mainly depends on a good compiler to schedule the instructions.The existing compiler GCC is a universal compiler which oriented at variety of architecture.As this specific C6000,GCC compiler has many shortcomings about the optimization in back-end of the compiler.If pointing to TMS320C6000 directly to product such an appropriate instructions,it not only causes the waste of the hardware resources,but also effects the capability of real-time response.So we should fix the back-end optimization based on GCC front-end and the architecture of C6000,when using the GCC compiler.And then we can insure the utilization of resources and the ability of real-time response.With the deep study of the GCC compiler and TMS320C6000 architecture,we combined the feature of the GCC and TMS320C6000.We improved the optimization of the instruction in the fundament of the GCC back-end structure.This paper,based on the original instruction scheduling,expand key words to identify the main path of a source program branch structure and divides new scheduling regions.We take precedent to execute the main path of the branch and when the branch turned out to the secondary path,we use compensatory instructions to recovery the state of the branch.So we expand the region of the code to be arranged.And we not only expand the region to be arranged,which could more effective to find paralleling instructions,but we also advanced executing the instructions we may execute.As we expand the new division for region and trace-scheduled technology,based on the new scheduling area of instruction parallelism and improvement of instruction scheduling for the middle language of GCC compiler back-end,we can rise the number of instructions executed per cycle and increase the extent in instruction parallelism when the program is executing.So we avoid the problem of program too big caused by the other kind of trace-schedule,and advance the executing speed of C6000.It will not only take advantage of the hardware resources,but also ensure the ability of real-time response.